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/*
* Device Tree Source for UniPhier PH1-LD4 SoC
*
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "skeleton.dtsi"
/ {
compatible = "socionext,ph1-ld4";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
};
};
clocks {
arm_timer_clk: arm_timer_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
extbus: extbus {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
};
uart0: serial@54006800 {
compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006800 0x20>;
clock-frequency = <36864000>;
};
uart1: serial@54006900 {
compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006900 0x20>;
clock-frequency = <36864000>;
};
uart2: serial@54006a00 {
compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006a00 0x20>;
clock-frequency = <36864000>;
};
uart3: serial@54006b00 {
compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006b00 0x20>;
clock-frequency = <36864000>;
};
i2c0: i2c@58400000 {
compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58400000 0x40>;
clock-frequency = <100000>;
status = "disabled";
};
i2c1: i2c@58480000 {
compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58480000 0x40>;
clock-frequency = <100000>;
status = "disabled";
};
i2c2: i2c@58500000 {
compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58500000 0x40>;
clock-frequency = <100000>;
status = "disabled";
};
i2c3: i2c@58580000 {
compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58580000 0x40>;
clock-frequency = <100000>;
status = "disabled";
};
system-bus-controller-misc@59800000 {
compatible = "socionext,uniphier-system-bus-controller-misc",
"syscon";
reg = <0x59800000 0x2000>;
};
usb0: usb@5a800100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
};
usb1: usb@5a810100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
};
usb2: usb@5a820100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
};
timer@60000200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>;
interrupts = <1 11 0x104>;
clocks = <&arm_timer_clk>;
};
timer@60000600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x60000600 0x20>;
interrupts = <1 13 0x104>;
clocks = <&arm_timer_clk>;
};
intc: interrupt-controller@60001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x60001000 0x1000>,
<0x60000100 0x100>;
};
nand: nand@68000000 {
compatible = "denali,denali-nand-dt";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
reg-names = "nand_data", "denali_reg";
};
};
};
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