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* powerpc/mpc85xx/p1_p2_rdb_pc: convert from nand_spl to new splScott Wood2012-11-26-274/+0
| | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
* spl/mpc85xx: rename cpu_init_nand.c to spl_minimal.cScott Wood2012-11-26-28/+28
| | | | | | | There is nothing really NAND-specific about this file. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
* spl/mpc85xx: move udelay to cpu codeScott Wood2012-11-26-55/+3
| | | | | | | | | It applies to non-Freescale 85xx boards as well as Freescale boards, so it doesn't belong in board/freescale. Plus, it needs to come out of nand_spl if it's to be used by the new SPL. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
* powerpc/mpc8xxx: move LAW code into arch/powerpc/cpu/mpc8xxxScott Wood2012-11-26-7/+7
| | | | | | | | | | | It's arch code and not a driver, so move it where it belongs. When it originally went into drivers/misc there was no 8xxx CPU directory. This will make new-SPL support a little easier since we can keep the CPU stuff together and not need to pull stuff in from drivers/misc. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
* nand_spl: fix u-boot.lst breakageScott Wood2012-11-14-8/+16
| | | | | | | | | | | | Commit 97b24d3d51a92cb8c0c1e1a74abf22fe1a1807a3 "common: Add symbol handling for generic lists into Makefile" introduced build errors in many nand_spl targets, complaining of a missing u-boot.lst. When not doing an out-of-tree build, $(obj) expands to nothing, so GCC ended up being given -I with no argument (or rather, -ansi was the argument). The failure didn't show up during a -j1 build because it was picking up the non-SPL version of u-boot.lst. Signed-off-by: Scott Wood <scottwood@freescale.com>
* common: Discard the __u_boot_cmd sectionMarek Vasut2012-10-22-9/+0
| | | | | | | | | | | The command declaration now uses the new LG-array method to generate list of commands. Thus the __u_boot_cmd section is now superseded and redundant and therefore can be removed. Also, remove externed symbols associated with this section from include/command.h . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
* common: Add .u_boot_list into all linker filesMarek Vasut2012-10-22-0/+15
| | | | | | | | | | Add section for the linker-generated lists into all possible linker files, so that everyone can easily use these lists. This is mostly a mechanical adjustment. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
* common: Add symbol handling for generic lists into MakefileMarek Vasut2012-10-22-18/+63
| | | | | | | | | | | | | | | | | | | | | | | This patch adds essential components for generation of the contents of the linker section that is used by the linker-generated array. All of the contents is held in a separate file, u-boot.lst, which is generated at runtime just before U-Boot is linked. The purpose of this code is to especially generate the appropriate boundary symbols around each subsection in the section carrying the linker-generated arrays. Obviously, the interim linker code for actual placement of the variables into the section is generated too. The generated file, u-boot.lst, is included into u-boot.lds via the linker INCLUDE directive in u-boot.lds . Adjustments are made in the Makefile and spl/Makefile so that the u-boot.lds and u-boot-spl.lds depend on their respective .lst files. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Joe Hershberger <joe.hershberger@ni.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2012-09-25-114/+187
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| * nand_spl: change out_be32 to raw_writel and depend on subsequent syncMatthew McClintock2012-08-23-73/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | This change reduces the SPL size by removing the redundant syncs produced by out_be32 and just replies on one final sync Done with: sed -r '/in_be32/b; s/(out_be32)\(([^,]*),\s+(.*)\)/__raw_writel(\3, \2)/g' -i `git grep --name-only sdram_init nand_spl/` Signed-off-by: Matthew McClintock <msm@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * nand_spl: p1023rds: wait before enabling DDR controllerMatthew McClintock2012-08-23-5/+20
| | | | | | | | | | | | | | | | We have a requirement to wait a period of time before enabling the DDR controller Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * nand_spl: update udelay for Freescale boardsMatthew McClintock2012-08-23-15/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's use the more appropriate udelay for the nand_spl. While we can't make use of u-boot's full udelay we can atl east use a for loop that won't get optimized away .Since we have the bus clock we can use the timebase to calculate wall time. Looked at reusing the u-boot udelay functions but it pulls in a lot of code and would require quite a bit of work to keep us within the very small space constrains we currently have Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/p1010rdb: nandboot: compare SVR properlyMatthew McClintock2012-08-23-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We were not comparing the SVRs properly previously. This comparison will properly shift the SVR and mask off the E bit This fixes the boot output to show the correct DDR bus width: 512 MiB (DDR3, 16-bit, CL=5, ECC off) instead of 512 MiB (DDR3, 32-bit, CL=5, ECC off) Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * p1014rdb: set ddr bus width properly depending on SVRMatthew McClintock2012-08-23-0/+11
| | | | | | | | | | | | | | | | | | | | Currently, for NAND boot for the P1010/4RDB we hard code the DDR configuration. We can still dynamically set the DDR bus width in the nand spl so the P1010/4RDB boards can boot from the same u-boot image Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * nand/fsl_elbc: shrink SPL a bit by converting out_be32() to __raw_writel()Scott Wood2012-08-22-22/+25
| | | | | | | | | | | | | | | | | | This is needed to make room for a bugfix on p1_p2_rdb_pc. A sync is used before the final write to LSOR that initiates the transaction, to ensure all the other set up has been completed. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mxc nand: Homogenize IP revisions with LinuxBenoît Thébaudeau2012-09-17-2/+2
| | | | | | | | | | | | | | | | | | | | Use the same IP revisions as in Linux in order to make the comparison more clear. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | spl mxc nand: Fix broken boot for correctable ECC errorsBenoît Thébaudeau2012-09-17-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | Do not stop boot as soon as an ECC error is detected. Only stop boot for uncorrectable ECC errors. This fixes boards no longer booting after some time because a NAND Flash bit has flipped. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | mxc nand: Access all ecc_status_result fieldsBenoît Thébaudeau2012-09-17-0/+4
| | | | | | | | | | | | | | | | | | | | | | On the NFC IP 1.1, the 32-bit ecc_status_result value comes from 2 consecutive 16-bit registers. This patch reads all the fields of this value, which makes a difference for 4-kiB NF pages. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | spl mxc nand: Set symmetric modeBenoît Thébaudeau2012-09-17-1/+2
| | | | | | | | | | | | | | | | | | | | | | Set the spl mxc nand driver for IP 1.1 in symmetric mode, like the mtd driver. In this way, for both drivers, one input clock period of the NFC IP will produce one R/W cycle. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | spl mxc nand: Remove duplicated codeBenoît Thébaudeau2012-09-17-8/+2
| | | | | | | | | | | | | | | | | | | | The ECC_EN and INT_MSK bits of CONFIG1 are not volatile, so it is sufficient to set them once in nfc_nand_init(). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | spl mxc nand: Merge duplicated codeBenoît Thébaudeau2012-09-17-27/+23
| | | | | | | | | | | | | | | | | | Merge duplicated code into functions, which is better for SPL size too. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | mxc nand: cosmectic: Light cleanupBenoît Thébaudeau2012-09-17-7/+7
| | | | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | mxc nand: Merge mtd and spl register definitionsBenoît Thébaudeau2012-09-17-29/+29
| | | | | | | | | | | | | | | | | | | | This patches fixes the TODO to use same register definitions in mtd mxc_nand and nand_spl fsl nfc drivers. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | ppc4xx: Canyonlands/Glacier: Squeeze NAND image a bit to fit againStefan Roese2012-09-03-3/+0
|/ | | | | | | This patch removes some superfluous SDRAM init calls to fit the NAND_SPL image into 4k again. Signed-off-by: Stefan Roese <sr@denx.de>
* Changes to move hawkboard to the new spl infrastructureSughosh Ganu2012-02-12-232/+0
| | | | | | | | | | | | | | | | | | This patch moves hawkboard to the new spl infrastructure from the older nand_spl one. Removed the hawkboard_nand_config build option -- The spl code now gets compiled with hawkboard_config, after building the main u-boot image, using the CONFIG_SPL_TEXT_BASE. Modified the README.hawkboard to reflect the same. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com> Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Christian Riesch <christian.riesch@omicron.at> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
* nand_spl: store ecc data on the stackScott Wood2012-01-26-26/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adapt the following patch from spl to nand_spl: Author: Stefano Babic <sbabic@denx.de> Date: Thu Dec 15 10:55:37 2011 +0100 nand_spl_simple: store ecc data on the stack Currently nand_spl_simple puts it's temp data at 0x10000 offset in SDRAM which is likely to contain already loaded data. The patch saves the oob data and the ecc on the stack replacing the fixed address in RAM. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Ilya Yanok <yanok@emcraft.com> CC: Scott Wood <scottwood@freescale.com> CC: Tom Rini <tom.rini@gmail.com> CC: Simon Schwarz <simonschwarzcor@googlemail.com> CC: Wolfgang Denk <wd@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com> While nand_spl is on its way out, in favor of spl, there are still many boards using it, and conversions are gradual. This allows us to get rid of CONFIG_SYS_NAND_ECCSTEPS and CONFIG_SYS_NAND_ECCTOTAL now, which would otherwise be likely to linger unreferenced after a conversion. It also eliminates a temporary error in the hawkboard_nand build, since the spl version of the patch removed ECCSTEPS/TOTAL from hawkboard.h, but the spl conversion is pending (and may be merged via a different tree). Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_spl/nand_boot.c: Fix build warningAnatolij Gustschin2011-12-07-2/+1
| | | | | | | | | | Fix: nand_boot.c: In function 'nand_read_page': nand_boot.c:150:6: warning: variable 'stat' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* davinci: Remove unwanted memsize.c from hawkboard's nand spl buildSughosh Ganu2011-12-06-6/+0
| | | | | | | | dram_init function in board/davinci/common/misc.c does not get compiled for spl builds, thus rendering inclusion of memsize.c useless. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
* arm, davinci: move misc function in arch treeHeiko Schocher2011-12-06-5/+4
| | | | | | | | | | | | move the board/davinci/common/misc.c file to arch/arm/cpu/arm926ejs/davinci/misc.c, so all davinci boards can use this functions. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
* arm, hawkboard: Use the pinmux configurations defined in the arch treeChristian Riesch2011-12-06-0/+5
| | | | | | | | | | | | | | | | The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors that contain pinmux configurations for emac, uarts, memory controllers... In an earlier patch such pinmux configurations were added to the arch tree. This patch makes the hawkboard use these definitions instead of defining its own. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Heiko Schocher <hs@denx.de>
* arm, davinci: Move pinmux functions from board to arch treeChristian Riesch2011-12-06-3/+3
| | | | | | | | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Nick Thompson <nick.thompson@ge.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Nick Thompson <nick.thompson@ge.com>
* Fix regression in SMDK6400Simon Schwarz2011-12-06-3/+6
| | | | | | | | | | | | | | | | | | | s3c64xx.c implemented its own nand_read_byte, nand_write_buf and nand_read_buf functions. This provoked a regression when these functions were made public by patch 55f429bb39614a16b1bacc9a8bea9ac01a60bfc8. This deletes these duplicated functions from s3c64xx.c and adds the generic implementations in nand_base.c to the spl Makefile. It also adds -ffcuntion-sections and -gc-sections to the compilation flags of the SPL to avoid errors originating from unused functions in nand_base.c. Description of the regression: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/108873 Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Cc: scottwood@freescale.com Cc: s-paulraj@ti.com Cc: albert.u.boot@aribaud.net
* nand_boot.c: Fix GCC 4.6 build warningsStefan Roese2011-11-16-5/+3
| | | | | | | | | | Fix: nand_boot.c: In function 'nand_read_page': nand_boot.c:190:6: warning: variable 'stat' set but not used [-Wunused-but-set-variable] nand_boot.c: In function 'nand_boot': nand_boot.c:271:6: warning: variable 'ret' set but not used [-Wunused-but-set-variable] Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2011-10-04-0/+42
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nand-flash: PPC: Fix socrates NAND problem PPC: Fix fsl_upm.c by renaming nand handling functions NAND: Make page, erase, oob size available via cmd_nand mtd: eLBC NAND: remove elbc_fcm_ctrl->oob_poi NAND: Add -y option to nand scrub command NAND: Add nand read.raw and write.raw commands NAND: Really ignore bad blocks when scrubbing spl, nand: add 4bit HW ecc oob first nand_read_page function mxc_nand: fix a problem writing more than 32MB mxc_nand: fixed some typos (cosmetic) nand: increase chip_delay in mv kirkwood nand driver
| * spl, nand: add 4bit HW ecc oob first nand_read_page functionHeiko Schocher2011-10-03-0/+42
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-10-04-0/+813
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for setting up RAID engine liodns on P5020 powerpc/85xx: Refactor some defines out of corenet_ds.h fm-eth: Add ability for board code to disable a port powerpc/mpc8548: Add workaround for erratum NMG_LBC103 powerpc/mpc8548: Add workaround for erratum NMG_DDR120 powerpc/mpc85xxcds: Fix PCI speed powerpc/mpc8548cds: Fix booting message powerpc/p4080: Add support for secure boot flow powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards powerpc/p2041rdb: remove watch dog related codes powerpc/p2041rdb: updated description of cpld command powerpc/p2041rdb: add more ddr frequencies support powerpc/p2041rdb: set sysclk according to status of physical switch SW1 powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver powerpc/mpc8xxx: Add DDR2 to unified DDR driver powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en powerpc/85xx: Refactor P2041RDB to use common p_corenet files powerpc/85xx: refactor common P-Series CoreNet files for FSL boards powerpc/85xx: Enable CMD_REGINFO on corenet boards powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries powerpc/85xx: Fix USB protocol definitions for P1020RDB powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM powerpc/mpc8xxx: Move DDR RCW overriding to common code powerpc/mpc8xxx: Extend CWL table powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 powerpc/85xx: Cleanup extern in corenet_ds board code powerpc/p2041rdb: Add ethernet support on P2041RDB board powerpc/85xx: Add networking support to P1023RDS powerpc/hydra: Add ethernet support on P5020/P3041 DS boards powerpc/85xx: Add FMan ethernet support to P4080DS powerpc/85xx: Add support for FMan ethernet in Independent mode powerpc/mpc8548cds: Cleanup mpc8548cds.c powerpc/mp: add support for discontiguous cores powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries fdt: Add new fdt_create_phandle helper fdt: Rename fdt_create_phandle to fdt_set_phandle powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010) powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC) fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010) powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB nand: Freescale Integrated Flash Controller NAND support powerpc/85xx: Add basic support for P1010RDB powerpc/85xx: Add support for new P102x/P2020 RDB style boards powerpc/85xx: relocate CCSR before creating the initial RAM area powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
| * powerpc/85xx: Add NAND/NAND_SPL support to P1010RDBDipen Dudhat2011-09-29-0/+271
| | | | | | | | | | | | | | | | | | And various defines to enable NAND support and NAND spl code for the P1010RDB platform. Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * nand: Freescale Integrated Flash Controller NAND supportDipen Dudhat2011-09-29-0/+271
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add NAND support (including spl) on IFC, such as is found on the p1010. Note that using hardware ECC on IFC with small-page NAND (which is what comes on the p1010rdb reference board) means there will be insufficient OOB space for JFFS2, since IFC does not support 1-bit ECC. UBI should work, as it does not use OOB for anything but ECC. When hardware ECC is not enabled in CSOR, software ECC is now used. Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> [scottwood@freescale.com: ECC rework and misc fixes] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/85xx: Add support for new P102x/P2020 RDB style boardsLi Yang2011-09-29-0/+271
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following boards share a common design but with minor variations between them: P1020MSBG-PC P1020RDB-PC P1020UTM-PC P1021RDB-PC P1024RDB P1025RDB P2020RDB-PC The P1020RDB-PC shares its roots in the existing P1020RDB board design, however uses DDR3 instead of DDR2. P2020RDB-PC differs from the P102x RDB-PC with 64-bit DDR and 100Mhz SYSCLK. Key features on these boards include: * DDR3 * NOR flash * NAND flash (on RDB's only) * SPI flash (on RDB's only) * SDHC/MMC card slot * VSC7385 Ethernet switch (on P1020MBG, P1020RDB, & P1021RDB) * PCIE slot and mini-PCIE slots As these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM is used to store SPD data. In case of absent or corrupted SPD, falling back to timing data embedded in the source code will be used. Raw timing data is extracted from DDR chip datasheet. Different speeds of DDR are supported with this approach. ODT option is forced to fit this set of boards, again because they don't have regular DIMMs. CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS is defined as 5ms to meet specification for writing timing. VSC firmware Address is defined by default in config file for eTSEC1. SD width is based off DIP switch. DIP switch is detected on the board by reading i2c bus and setting the appropriate mux values. Some boards have QE module in the silicon (P1021 and P1025). QE and eLBC have pins multiplexing. QE function needs to be disabled to access Nor Flash and CPLD. QE-UEC and QE-UART can be enabled for linux kernel by setting "qe" in hwconfig. In addition, QE-UEC and QE-TDM also have pins multiplexing, to enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below 'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD. 'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Zhao Chenhui <b26998@freescale.com> Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Tang Yuantian <b29983@freescale.com> Signed-off-by: ramneek.mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Akhil Goyal <akhil.goyal@freescale.com>
* | MX31: mx31pdk: Remove nand_spl config.mk fileFabio Estevam2011-09-30-2/+1
|/ | | | | | | No need to have a config.mk to only store a single line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* ARM: hawkboard_nand: fix compilation of nand_splStefano Babic2011-09-10-3/+18
| | | | | | get_ram_size() is called, but memsize.c is not compiled. Signed-off-by: Stefano Babic <sbabic@denx.de>
* Convert ISO-8859 files to UTF-8Albert ARIBAUD2011-08-04-1/+1
| | | | | | | | There was a mix of UTF-8 and ISO-8859 files in the U-Boot source tree, which could cause issues with the patchwork review system. This commit converts all ISO-8859 files to UTF-8. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* replace CONFIG_PRELOADER with CONFIG_SPL_BUILDAneesh V2011-07-26-6/+6
| | | | | | replace all occurences of CONFIG_PRELOADER with CONFIG_SPL_BUILD Signed-off-by: Aneesh V <aneesh@ti.com>
* powerpc/85xx: Add basic support for P1023RDS boardRoy Zang2011-07-11-0/+231
| | | | | | | | | | | | | | The P1023RDS board is the reference board for the P1023 SoC. Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe, UART, I2C, etc. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* NAND: Add 16bit NAND support for the NDFCAlex Waterman2011-07-01-3/+8
| | | | | | | | | | | | | | | | | | | This patch adds support for 16 bit NAND devices attached to the NDFC on ppc4xx processors. Two config entries were added: CONFIG_SYS_NDFC_16 - Setting this tells the NDFC that a 16 bit device is attached. CONFIG_SYS_NDFC_EBC0_CFG - This is for the External Bus Controller configuration register. Also, a new ndfc_read_byte() function was added which does not first convert the data to little endian. The NAND SPL was also modified to do 16bit bad block testing when a 16 bit chip is being used. Signed-off-by: Alex Waterman <awaterman@dawning.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Add _end for the end of u-boot image for SMDK6400seedshope2011-05-26-0/+2
| | | | | | | | Since we rename _end to __bss_end__, But we need add _end symbol for the end of u-boot image. Signed-off-by: Zhong Hongbo <bocui107@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* nand_spl: nand_boot.c: Remove last CONFIG_SYS_NAND_READ_DELAY occuranceStefan Roese2011-05-16-5/+2
| | | | | | | | | | | | Remove the last CONFIG_SYS_NAND_READ_DELAY occurance from nand_boot.c. I missed this one in patch a9c847cb [nand_spl: nand_boot.c: Remove CONFIG_SYS_NAND_READ_DELAY]. This fixes a compile breakage on kilauea_nand for example. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_spl: nand_boot.c: Remove CONFIG_SYS_NAND_READ_DELAYStefan Roese2011-05-13-18/+6
| | | | | | | | | | | | | | | | | | | | | | | | There are multiple reasons why this define should be removed: First it saves some space and therefore fixes a problem we have on the canyonlands_nand and glacier_nand targets right now. Second, the define was hackish and would most likely not work on all board using nand_boot.c. Boards not providing a real dev_ready() function should implement a board specific function instead. I checked and it seems, that all boards using nand_boot.c right now already implement a board specific dev_ready() function. So this patch should not break any boards and will result in smaller NAND_SPL images. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Tested-by: Sughosh Ganu <urwithsughosh@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_spl: nand_boot.c: Init nand_chip.options to 0Stefan Roese2011-05-13-0/+1
| | | | | | | | | | | | Patch 65a9db7b [nand_spl: Fix large page nand_command()] broke nand booting on canyonlands. "options" has to be initialized to 0. If not, boards might have the NAND_BUSWIDTH_16 bit set, resulting in wrong offset calculation. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Cc: Alex Waterman <awaterman@dawning.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Decreases code size of the nand_splAlex Waterman2011-05-13-8/+10
| | | | | | | | | | The canyonland boards nand_spl size is just under the maximum 4KByte size. This patch decreases the size of the nand_spl to make a previous commit - commit 65a9db7be0868be91ba81b9b5bf821de82e6d9b0 - fit in the nand_spl. Signed-off-by: Alex Waterman <awaterman@dawning.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
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