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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2012-08-13 22:49:31 +0200
committerScott Wood <scottwood@freescale.com>2012-09-17 19:42:46 -0500
commit0e55ad7271259b1de183fb5329ea7f07774e368d (patch)
treee5d86fb0d57e91280990e15d9dce0906053acf24 /nand_spl
parent0eee20fc1bb16f484771d626e1d7bde7d770a01c (diff)
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spl mxc nand: Set symmetric mode
Set the spl mxc nand driver for IP 1.1 in symmetric mode, like the mtd driver. In this way, for both drivers, one input clock period of the NFC IP will produce one R/W cycle. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'nand_spl')
-rw-r--r--nand_spl/nand_boot_fsl_nfc.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/nand_spl/nand_boot_fsl_nfc.c b/nand_spl/nand_boot_fsl_nfc.c
index 059969b..842943c 100644
--- a/nand_spl/nand_boot_fsl_nfc.c
+++ b/nand_spl/nand_boot_fsl_nfc.c
@@ -57,7 +57,8 @@ static void nfc_nand_init(void)
writew(0x2, &nfc->config);
/* hardware ECC checking and correct */
- config1 = readw(&nfc->config1) | NFC_ECC_EN | NFC_INT_MSK | NFC_FP_INT;
+ config1 = readw(&nfc->config1) | NFC_ECC_EN | NFC_INT_MSK |
+ NFC_ONE_CYCLE | NFC_FP_INT;
/*
* if spare size is larger that 16 bytes per 512 byte hunk
* then use 8 symbol correction instead of 4