| Commit message (Collapse) | Author | Age | Lines |
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Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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Add FEC pin set and mii reset in __mii_init(). Change
legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
change cfi_offset to 0, and change CFG_FLASH_CFI to
CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
M54455EVB env settings in configuration file.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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The user manuals recommend 7.
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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M5249EVB, M5271EVB, M5272C3, M5275EVB and M5282EVB platforms
uart baudrate increase from 19200 to 115200 bps
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We
also have SERDES init code for the 8536.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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All 85xx boards have been converted to the new code so we can
remove the old SPD DDR setup code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Provide a helper function that board code can call to map TLBs when
setting up DDR.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The main purpose of this rewrite it to be able to share the same
initialization code on all FSL PowerPC products that have DDR
controllers. (83xx, 85xx, 86xx).
The code is broken up into the following steps:
GET_SPD
COMPUTE_DIMM_PARMS
COMPUTE_COMMON_PARMS
GATHER_OPTS
ASSIGN_ADDRESSES
COMPUTE_REGS
PROGRAM_REGS
This allows us to share more code an easily allow for board specific code
overrides.
Additionally this code base adds support for >4G of DDR and provides a
foundation for supporting interleaving on processors with more than one
controller.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Provide a helper function that will setup the last available
LAWs (upto 2) for DDR. Useful for SPD/dyanmic DDR setting code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Also adds helper functions for DDR1/2 to verify the checksum.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Created a new fdt_initrd() to deal with setting the initrd properties
in the device tree and fixing up the mem reserve. We can use this
both in the choosen node handling and lets us remove some duplicated
code when we fixup the initrd info in bootm on PPC.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Move the fdt resizing code out of ppc specific boot code and into
common fdt support code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Created a bootm_start() that handles the parsing and detection of all
the images that will be used by the bootm command (OS, ramdisk, fdt).
As part of this we now tract all the relevant image offsets in the
bootm_headers_t struct. This will allow us to have all the needed
state for future sub-commands and lets us reduce a bit of arch
specific code on SPARC.
Created a bootm_load_os() that deals with decompression and loading
the OS image.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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To allow for persistent state between future bootm subcommands we
need the lmb to exist in a global state.
Moving it into the bootm_headers_t allows us to do that.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Set the fdt working address so "fdt FOO" commands can be used as part
of the bootm flow. Also set an the environment variable "fdtaddr"
with the value.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Move the code that handles finding a device tree blob and relocating
it (if needed) into common code so all arch's have access to it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Move determing if we have a ramdisk and where its located into the
common code. Keep track of the ramdisk start and end in the
bootm_headers_t image struct.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Move entry point code out of each arch and into common code.
Keep the entry point in the bootm_headers_t images struct.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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fix mvBL-M7 config and move to matrix_vision subdir
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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devices
This patch adds elements to the 83xx sysconf structure and #define values that are used
by mpc83xx family devices.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Add the ability for the MPC8349EMDS to run in PCI Agent mode, acting as a
PCI card rather than a host computer.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Change the MPC8349EMDS board to use the generic PCI initialization code
for the mpc83xx cpu.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Freescale ships MPC8315E-RDB boards either with TSEC1 and USB UTMI
support, or without TSEC1 but with USB ULPI PHY support in addition.
With this patch user can specify desired USB PHY.
Also, it seems that we can't distinguish the two boards in software, so
user have to set `mpc8315erdb' environment variable to either 'tsec1'
(TSEC1 enabled) or `ulpi' (board with ULPI PHY, TSEC1 disabled), so that
Linux will not probe for TSEC1.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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