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* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-35597/+35597
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* mgsuvd, mgcoge: added BOOTCOUNT feature.Heiko Schocher2008-10-18-0/+4
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge, mgsuvd: added support for the IVM EEprom.Heiko Schocher2008-10-18-0/+12
| | | | | | | | The EEprom contains some Manufacturerinformation, which are read from u-boot at boot time, and saved in same hush shell variables. Signed-off-by: Heiko Schocher <hs@denx.de>
* I2C: adding new "i2c bus" Command to the I2C Subsystem.Heiko Schocher2008-10-18-0/+2
| | | | | | | With this Command it is possible to add new I2C Busses, which are behind 1 .. n I2C Muxes. Details see README. Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge, mgsuvd: add board specific I2C deblocking mechanism.Heiko Schocher2008-10-18-0/+2
| | | | | | | | | | | | | | | | | | | | As documented in doc/I2C_Edge_Conditions, adding a board specific deblocking mechanism via CFG_I2C_INIT_BOARD for the mgcoge and mgsuvd board. This code was originally written by Keymile in association with Anatech and Atmel in 1998. The Code toggels the SCL until the SCA line goes to HIGH (max. 16 times). And after this, a start condition is sent. This is another approach to deblock the I2C Bus. The soft I2C driver actually sends 9 clocks with SDA High, and then a stop at the end, to deblock the I2C Bus. Maybe we should use the approach from Keymile as the new standard? Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge, mgsuvd: add DTT (LM75) support.Heiko Schocher2008-10-18-0/+18
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge, mgsuvd: added EEprom support.Heiko Schocher2008-10-18-0/+15
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge, mgsuvd: add I2C support.Heiko Schocher2008-10-18-0/+68
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* Change UEC PHY interface to RGMII on MPC8568MDSHaiying Wang2008-10-18-2/+2
| | | | | | | | | | | | | | Change UEC phy interface from GMII to RGMII on MPC8568MDS board Because on MPC8568MDS, GMII interface is only recommended for 1000Mbps speed, but RGMII interface can work at 10/100/1000Mbps, and RGMII interface works more stable. Now both UEC1 and UEC2 can work properly under u-boot. It is also in consistent with the kernel setting for 8568 UEC phy interface. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Remove unwanted ';' at end of define.Selvamuthukumar2008-10-14-12/+12
| | | | | | | | | | | | | Currently this is not creating any problem. But it will result in compilation error when used as below. printf("CFG_SDRAM_CFG2 - %08x\n", CFG_SDRAM_CFG2); Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> continuation of the theme based on git grep "^#define CFG_.*;$" include/ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Remove unused CFG_EEPROM_PAGE_WRITE_ENABLE referencesPeter Tyser2008-10-14-66/+0
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* sh: rsk7203: Add smc911x driver support to board config fileNobuhiro Iwamatsu2008-10-14-0/+5
| | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese2008-10-13-14/+36
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| * Merge branch 'master' of ssh://10.10.0.7/home/wd/git/u-boot/masterWolfgang Denk2008-10-12-7/+3
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| | * Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2008-10-12-7/+3
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| | | * i.MX31: switch to CFG_HZ=1000Guennadi Liakhovetski2008-10-08-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch to the standard CFG_HZ=1000 value, while at it, minor white-space cleanup, remove CFG_CLKS_IN_HZ from config-headers. Tested on mx31ads, provides 2% or 0.4% precision depending on the CONFIG_MX31_TIMER_HIGH_PRECISION flag. Measured with stop-watch on 100s boot-delay. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * | | Merge branch 'master' of ssh://10.10.0.7/home/wd/git/u-boot/masterWolfgang Denk2008-10-12-7/+30
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| | * | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2008-10-12-4/+18
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| | | * | MPC8572DS: Fix compile warningsKumar Gala2008-10-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 445a7b38308eb05b41de74165b20855db58c7ee5 introduced the following compile warnings: cmd_i2c.c:112: warning: missing braces around initializer cmd_i2c.c:112: warning: (near initialization for 'i2c_no_probes[0]') Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | | * | Remove redundant #define for MPC8536DSHaiying Wang2008-10-07-1/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
| | | * | Add ID EEPROM support for MPC8572DSHaiying Wang2008-10-07-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ID EEPROM on MPC8572DS board locates on I2C bus 1. Its the storage for system information like mac addresses etc. This patch enables it. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
| | | * | Minor fixes for I2C address on MPC8572DSHaiying Wang2008-10-07-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC8572DS has two i2c buses. This patch moves the DDR SPD_EEPROM to i2c bus 1 according to the board spec, and adds the 2nd i2c bus offset. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
| | | * | Fix the incorrect DDR clk freq reporting on 8536DSJason Jin2008-10-07-1/+1
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On 8536DS board, When the DDR clk is set async mode(SW3[6:8] != 111), The display is still sync mode DDR freq. This patch try to fix this. The display DDR freq is now the actual freq in both sync and async mode. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
| | * | mpc83xx: don't disable autobootKim Phillips2008-09-24-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bootdelay set to -1 'permanently' disables autobooting, even if bootcmd is specified. Change to a positive value to allow autobooting when a bootcmd is set. Reported-by: Coray Tate <Coray.Tate@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | mpc83xx: add h/w flash protection to board configsKim Phillips2008-09-24-0/+9
| | |/ | | | | | | | | | | | | | | | | | | | | | the operating system may leave flash in a h/w locked state after writing. This allows u-boot to continue to write flash by enabling h/w unlocking by default. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | TQM5200: enable support for ATAPI devicesWolfgang Denk2008-10-01-0/+3
| |/ | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ppc4xx: Update DU440 configMatthias Fuchs2008-10-10-2/+4
|/ | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* socrates: change default mtest address rangeAnatolij Gustschin2008-09-22-2/+2
| | | | | | | | Running mtest command on socrates without specifying an address range crashes the board. This patch changes default mtest address range to prevent this behavior. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* socrates: fix SPD EEPROM addressAnatolij Gustschin2008-09-22-1/+1
| | | | | | | | | Commit be0bd8234b9777ecd63c4c686f72af070d886517 changed SPD EEPROM address to 0x51 and DDR SDRAM detection stopped working. Change this address back to 0x50. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* ADS5121: fix typo in "rootpath" default settingWolfgang Denk2008-09-18-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* TQM8xx: Fix CFI flash driver support for all TQM8xx based boardsWolfgang Denk2008-09-16-10/+43
| | | | | | | | | | After switching to using the CFI flash driver, the correct remapping of the flash banks was forgotten. Also, some boards were not adapted, and the old legacy flash driver was not removed yet. Signed-off-by: Wolfgang Denk <wd@denx.de>
* 85xx: socrates: Add support for new image format.u-boot@bugs.denx.de2008-09-13-0/+5
| | | | Signed-off-by: Detlev Zundel <dzu@denx.de>
* Merge branch 'Makefile-next' of git://git.denx.de/u-boot-armWolfgang Denk2008-09-12-2651/+2650
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| * ap325rxa: remove duplicate CONFIG_FLASH_CFI_DRIVERJean-Christophe PLAGNIOL-VILLARD2008-09-10-1/+0
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * rename CFG_ENV macros to CONFIG_ENVJean-Christophe PLAGNIOL-VILLARD2008-09-10-1906/+1906
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASHJean-Christophe PLAGNIOL-VILLARD2008-09-10-458/+458
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * cleanup use of CFG_ENV_IS_IN_FLASHJean-Christophe PLAGNIOL-VILLARD2008-09-10-5/+5
| | | | | | | | | | | | | | | | - #if CFG_ENV_IS_IN_FLASH - #if (CFG_ENV_IS_IN_FLASH == 1) - #define CFG_ENV_IS_IN_FLASH 0 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * rename CFG_ENV_IS_NOWHERE in CONFIG_ENV_IS_NOWHEREJean-Christophe PLAGNIOL-VILLARD2008-09-10-52/+52
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * rename CFG_ENV_IS_IN_SPI_FLASH in CONFIG_ENV_IS_IN_SPI_FLASHJean-Christophe PLAGNIOL-VILLARD2008-09-10-2/+2
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * rename CFG_ENV_IS_IN_ONENAND in CONFIG_ENV_IS_IN_ONENANDJean-Christophe PLAGNIOL-VILLARD2008-09-10-1/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * rename CFG_ENV_IS_IN_NVRAM in CONFIG_ENV_IS_IN_NVRAMJean-Christophe PLAGNIOL-VILLARD2008-09-10-80/+80
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * rename CFG_ENV_IS_IN_NAND in CONFIG_ENV_IS_IN_NANDJean-Christophe PLAGNIOL-VILLARD2008-09-10-25/+25
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * rename CFG_ENV_IS_IN_DATAFLASH in CONFIG_ENV_IS_IN_DATAFLASHJean-Christophe PLAGNIOL-VILLARD2008-09-10-13/+13
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * rename CFG_ENV_IS_IN_EEPROM in CONFIG_ENV_IS_IN_EEPROMJean-Christophe PLAGNIOL-VILLARD2008-09-10-110/+110
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * cmd_mac: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-09-10-5/+5
| | | | | | | | | | | | | | finish remaning CFG_ID_EEPROM in CONFIG_ID_EEPROM start in commit ad8f8687b78c3e917b173f038926695383c55555 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2008-09-12-1/+6
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| * | ppc4xx: Enable device tree (FDT) support in zeus board portStefan Roese2008-09-12-0/+6
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Fix SDRAM inititialization of multiple 405 based board portsStefan Roese2008-09-12-1/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a problem introdiced with patch bbeff30c [ppc4xx: Remove superfluous dram_init() call or replace it by initdram()]. The boards affected are: - PCI405 - PPChameleonEVB - quad100hd - taihu - zeus Signed-off-by: Stefan Roese <sr@denx.de>
* | ARM OMAP : Correct Invalid Timer Register Field Declaration in omap1510.h & ↵Gururaja Hebbar K R2008-09-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap730.h - Correct Invalid #define of MPUTIM_PTV_MASK for omap1510 & omap730 register definition MPUTIM_PTV_MASK is defined as #define MPUTIM_PTV_MASK (0x7<<PTV_BIT) while it should have been #define MPUTIM_PTV_MASK (0x7<<MPUTIM_PTV_BIT) - Below Patch corrects the same Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
* | i.MX31: Make the SPI bus and chip select configurable for MC13783Magnus Lilja2008-09-12-0/+6
|/ | | | | | | | | | | The i.MX31 has three SPI buses and each bus has several chip selects and the MC13783 chip can be connected to any of these. The current RTC driver for MC13783 is hardcoded for CSPI2/SS2. This patch makes make MC13783 SPI bus and chip select configurable via CONFIG_MC13783_SPI_BUS and CONFIG_MC13783_SPI_CS. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
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