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* MLK-12001 MMC:USDHC: Clear DLL_CTRL delay line settings at driver initYe.Li2015-12-14-0/+3
| | | | | | | | | | | | Clear DLL_CTRL delay line settings at USDHC initialization to eliminate the pre-settings from boot rom. U-boot should re-init the USDHC not reply on the value set by boot from. On MX6DL, the ROM has set the default delay line(DLLCTRL) to 0x1000021, when eMMC works on DDR mode in kernel, it will possibly cause data CRC errors. Even u-boot always use eMMC in SDR mode, for safety sake, it is better to clear it too. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11952 Video: IPU: Fix dereferencing NULL pointer problemYe.Li2015-12-04-0/+4
| | | | | | | | By Coverity check, the clk_set_rate function dereferences the clk pointer without checking whether it is NULL. This may cause problem when clk is NULL. Fix the problem by adding NULL check. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11897 video: ipu: fix out of bounds accessPeng Fan2015-11-27-2/+3
| | | | | | | | | We need to access reg stp_rep9, but not stp_rep[(9 - 1) / 2]. If using "__raw_writel(0, DI_STP_REP(disp, 9))", this will exceeds the size of stp_rep array. Acked-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MA-7251 - [evk_6ul]: Support boot conctrol for brillofang hui2015-11-13-24/+550
| | | | | | | | | brillo need bootlader support boot control. bootlader can choose which slot(partition) to boot based on it's tactic. The commit support boot control for evk6ul Signed-off-by: fang hui <b31070@freescale.com>
* MA-7157 Check the error log in fastboot flashzhang sanshan2015-11-06-0/+2
| | | | | | | | The fastboot.exe will get var partition-type:* firstly when "fastboot flash * *". The uboot did not support get var partition-type: default. This patch mask info the error when gat cat partition-type. Signed-off-by: zhang sanshan <b51434@freescale.com>
* MLK-11823 USB:gadget Fix USB port interface issue in ci_udc driverYe.Li2015-11-04-1/+1
| | | | | | | | | | | | | The ci_udc driver tries to use the ULPI interface for the USB OTG controller, but this type is not supported by all i.MX6 and i.MX7 platforms. When setting to ULPI, other platforms except the 6UL refuse the settings and keep default value. But on 6UL, the PTW bit of PORTSC1 register which is documented as RO can change. This cause the interface setting problem with USB PHY. Fix the issue by removing the ULPI setting for i.MX6 and i.MX7. All will use default UTMI setting. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11718-2: mtd: nand: change the BCH layout setting for large oob NANDHan Xu2015-10-15-23/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | The cod change updated the NAND driver BCH ECC layout algorithm to support large oob size NAND chips(oob > 1024 bytes). Current implementation requires each chunk size larger than oob size so the bad block marker (BBM) can be guaranteed located in data chunk. The ECC layout always using the unbalanced layout(Ecc for both meta and Data0 chunk), but for the NAND chips with oob larger than 1k, the driver cannot support because BCH doesn’t support GF 15 for 2K chunk. The change keeps the data chunk no larger than 1k and adjust the ECC strength or ECC layout to locate the BBM in data chunk. General idea for large oob NAND chips is 1.Try all ECC strength from the minimum value required by NAND spec to the maximum one that works, any ECC makes the BBM locate in data chunk can be chosen. 2.If none of them works, using separate ECC for meta, which will add one extra ecc with the same ECC strength as other data chunks. This extra ECC can guarantee BBM located in data chunk, of course, we need to check if oob can afford it. Signed-off-by: Han Xu <b45815@freescale.com>
* MLK-11433 driver: fastboot: Discard unused directoryPeng Fan2015-08-28-9/+0
| | | | | | | CONFIG_FASTBOOT is not used, since we have CONFIG_FSL_FASTBOOT and CONFIG_CMD_FASTBOOT for fastboot. "drivers/fastboot" can be discarded. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-11263-2 video: epdc: move setup_waveform_file to board commonPeng Fan2015-08-03-1/+1
| | | | | | | | | | | Since setup_waveform_file in different boards code have same implementation, move setup_waveform_file to board common code. Also rename it to board_setup_waveform_file This patch also fix a bug when using flush_cache. We should pass 'waveform_buf' to flush_cache, but not a string named 'addr'. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-11263-1 video: epdc: support display logo on E-Ink screenPeng Fan2015-08-03-12/+4
| | | | | | | | | | | | | | | | | | | Support draw image on E-ink screen. 1. The image format should be PGM-P5 raw data format. 2. The image should be named epdc_logo.pgm. 3. If no epdc_logo.pgm found in the first partition(FAT), will choose to draw black border on the screen. 4. Default configuration is to draw image at pos (0,0). If 'splashpos' env is set, will choose the pos from 'splashpos'. 5. The image size should not be bigger than screen total pixel size. 6. Implement board_setup_logo_file in board/freescale/common/epdc_setup.c 7. Introudce function prototype for board_setup_logo_file. Note: i.MX7D EPDC supports advanced mode and standard mode. Since current PXP in uboot for i.MX7D not ready, only support standard mode now. advanced and standard mode needs waveform firmware's support. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MA-6928 Bootargs cannot be setzhang sanshan2015-07-28-20/+0
| | | | | | | | | The bootargs is not set correctly. The final bootargs consist of uboot's bootargs and bootimg's bootargs. This patch set bootimg's bootargs as final bootargs if uboot's bootargs is not set. And take uboot's bootargs as final bootargs if uboot's bootargs is set. Signed-off-by: zhang sanshan <b51434@freescale.com>
* MA-6924 [Android_MX6_MX7] fastboot: 'fastboot reboot-bootloader' do not workzhang sanshan2015-07-27-6/+6
| | | | | | | | 'fastboot reboot-bootloader' is took as 'fastboot reboot' in V2015.04. The length of fastboot command is decided by the length of cmd_dispatch_info's cmd. So need put reboot-bootloader in front of reboot. Signed-off-by: zhang sanshan <b51434@freescale.com>
* MLK-11228-3 android: Add "data" partition in fastbootYe.Li2015-07-13-6/+13
| | | | | | | | | Enable fastboot command "fastboot flash data" Custom may need to update data partition in fastboot mode. This patch enable flash data partition in emmc\sd. Signed-off-by: Zhang Sanshan <b51434@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11228-2 android: Add fastboot command "reboot-bootloader" supportYe.Li2015-07-13-3/+17
| | | | | | | | | enable fastboot command: "fastboot reboot-bootloader" After type this command, the board will reboot to bootloader mode. Set ANDROID_FASTBOOT_BOOT flag in SNVS_LPGPR before reboot. Signed-off-by: Zhang Sanshan <b51434@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11228-1 android: Integrate community fastboot with FSL i.MX fastbootYe.Li2015-07-13-1129/+1746
| | | | | | | | | | | | | | | | | | | | | 1. Replace the UDC driver with community's USB gadget d_dnl driver. 2. Integrate the FSL SD/SATA/NAND flash operations, since the GPT and EFI partitions are not support by i.MX. 3. Add FDT support to community's android image. 4. Change the booti command to boota, due to the booti has been used for ARM64 image boot. 5. Modify boota implementation to load ramdisk and fdt to their loading addresses specified in boot.img header, while bootm won't do it for android image. 6. Modify the android image HAB implementation. Authenticate the boot.img on the "load_addr" for both SD and NAND. 7. Enable new configuration CONFIG_FSL_FASTBOOT for Freescale's fastboot with relevant header file "fsl_fastboot.h". While disabling the configuration, the community fastboot is used. 8. Use community's way to combine cmdline in boot.img and u-boot environment, not overwrite the cmdline in boot.img Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11035 imx: mx6 update thermal slope factorsPeng Fan2015-06-12-2/+2
| | | | | | | | | | | | | | | | | | | | From temp sensor guys: " I confirmed the math with him(had do the accuracy study) today. The new, final equation is: Tmeas = (Nmeas - n1) / slope + t1 + offset n1= fused room count t1= 25 offset=3.580661 slope= 0.4148468 – 0.0015423*n1 " 87723f903454aaf17336e0fe9098ea7911c19f3c update the thermal with not accurate slope parameters. This patch fix it. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10981 mxc: ocotp fix hole in shadow registersPeng Fan2015-05-29-5/+74
| | | | | | | | | | | | | | | | | | | | There is a hole in shadow registers address map of size 0x100 between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL. Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses, we should account for this hole in address space. Similar hole exists between bank 14 and bank 15 of size 0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX. Note: iMX6SL has only 0-7 banks and there is no hole. Note: iMX6UL doesn't have this one. When reading, we use register offset, so need to account for holes to get the correct address. When writing, we use bank/word index, there is no need to account for holes, always use bank/word index from fuse map. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10931 imx: wdog: Turn off internal reset signal for mx7dYe.Li2015-05-20-0/+4
| | | | | | | Set wdog WCR register SRS bit to turn off internal reset signal WDOG_RESET_B_DEB for mx7d. So that the warm reset is disabled. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-10884 imx: MX6SX: Fix IOMUXC GPR registers access issueYe.Li2015-05-13-4/+0
| | | | | | | | The iomuxc structure has changed to add 0x4000 offset for i.MX6SX and UL, so when using this structure to access gpr registers needs to change the base address to IOMUXC_BASE_ADDR. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-10740: add maximum ecc platfrom can supportHan Xu2015-05-07-1/+7
| | | | | | | | Add maximum ecc strength for each platfrom to avoid the calculated ecc exceed the limitation. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit fdc5bac6ae8b699924c4e84b86e38aa73f694827)
* MLK-10747-2 video: ipu: Enable/disable LDB_DI clock when necessaryLiu Ying2015-05-07-7/+65
| | | | | | | | This patch adds enable/disable hooks support for ldb_di[0/1] clocks and enables/disables them when necessary. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 839a1da941be48baf27c9cb28939cc6b2030424a)
* MLK-10747-1 video: ipu: Build ldb_di clock relevant code only for MX6 and MX53Liu Ying2015-05-07-2/+14
| | | | | | | | The LDB is found in MX6 variants and MX53, so this patch makes the ldb_di clock relevant code be built only for them. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit c0dc175a9780505ec8939bda5dda9c2ec549a7f0)
* MLK-10827 imx: mx6 update thermal driver according new equationPeng Fan2015-05-06-17/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From IC guys: " After a thorough accuracy study of the Temp sense circuit, we found that with our current equation, an average part can read 7 degrees lower than a known forced temperature. We also found out that the standard variance was around 2C; which is the tightest distribution that we could create. We need to change the temp sense equation to center the average part around the target temperature. Old Equation: Temp = Troom,cal – slope*(Count measured – Count room fuse) Where Troom,cal = 25C and Slope = 0.4297157 – (0.0015974 * Count room fuse) New Equation: Temp = Troom,cal – slope*(Count measured – Count room fuse) +offset Where Troom,cal = 25C and Slope = 0.4445388 – (0.0016549 * Count room fuse) Offset = 3.580661 " According the new equation, update the thermal driver. c1 and c2 changed to u64 type and update comments. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10812-6 net: fec: add platform check to avoid to access the reserved ↵Peng Fan2015-05-05-1/+4
| | | | | | | | | register Add platform check to avoid to access the reserved register Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10812-5 imx: qspi i.MX6UL needs at least 16 bytes when writePeng Fan2015-05-05-2/+2
| | | | | | i.MX6UL qspi controller also needs at least 16 bytes when writing. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10812-4 mxc:gpio Add MX6UL supportPeng Fan2015-05-05-0/+4
| | | | | | comment out GPIO6/7 for MX6UL Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10812-1 imx:mx6 add i2c4 supportPeng Fan2015-05-05-2/+5
| | | | | | I2C4 support for i.MX Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10701 net: fec_mxc: setup right value for mdio hold timeFugang Duan2015-04-29-1/+3
| | | | | | | | | | | | | | The minimal hold time according to IEE802.3 (clause 22) is 10 ns. HOLDTIME + 1 is the number of clk cycles the fec is holding the output. Set the right hold time value when the MDC root clock is greater than 100Mhz. The issue was reported on i.MX28 and is fixed by Uwe Kleine-König in kernel: https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/ drivers/net/ethernet/freescale/fec_main.c?id=63c607321492c5efc7a31bc4ea734b877f8e7f87 Signed-off-by: Fugang Duan <B38611@freescale.com> (cherry picked from commit 0373a160e7f698064a6625e85f9120b6c81c1b61)
* MLK-10774-49 imx: pcie update to align with imx_v2014.04Peng Fan2015-04-29-4/+87
| | | | | | | Update pcie code to align with imx_v2014.04. Mainly add DEBUG related stuff. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10655 Video: Fix second line string display issueYe.Li2015-04-29-4/+5
| | | | | | | | | | The string display on second line repeats the last word of first line and does not show full. This is the bug introduced by the fixing to MLK-10542. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit ac430cee8c42f0acad9e126631d772b99f1166ea) (cherry picked from commit ff62c5b275a9b5e47d570d3eb10622799bf12070)
* MLK-10542 video: Support multiple lines version string displayYe.Li2015-04-29-7/+23
| | | | | | | | | | | | The caculation of left space for version string is not correct, should use VIDEO_COLS not VIDEO_LINE_LEN / 2, otherwise we will get larger space than actual have and cause string to overlay logo picture. Also current version string display only supports two lines words at max. This also causes overlay when the LCD pixel colume size is not enough. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit ed53487d36a886fb4557088804a4b5232b168889)
* MLK-10774-42 imx:mx7:thermal fix reading temperaturePeng Fan2015-04-29-10/+10
| | | | | | Fix reading temperature. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10478 mx6: EPDC: Improve EPDC usage and configurationYe.Li2015-04-29-3/+21
| | | | | | | | | | | | | | Change to load EPDC waveform from FAT partition and allocate waveform buffer, framebuffer and working buffer in dynamic manner not static. So many EPDC configurations are removed. To enable the EPDC feature, must define CONFIG_MXC_EPDC and CONFIG_SPLASH_SCREEN. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 4d55a4124be3a3a6288c3c845d17fd9d4f2b8b43) Conflicts: include/configs/mx6slevk.h
* MLK-10467 mtd:spi Add ATMEL AT45DB021E supportPeng Fan2015-04-29-2/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to add atmel AT45DB021E spi flash support. Since this flash is different from the spi flash that we previous use such as m25p32 and spanion spi nor flashes, pieces of code are added. 1. The default page size is 264 bytes, but the mtd/spi framework can not handle such page. So we need to configure the page size from 264 to 256 bytes. Page Size command seq “Power of 2” binary page size (256 bytes)| 3Dh 2Ah 80h A6h DataFlash page size (264 bytes) | 3Dh 2Ah 80h A7h And when probe the flash, configure the flash to 256 bytes page size, if the page size is already 256bytes, just return and do not configure it again. The page size configuration times is only about 10000, so to avoid configuring it each time. 2. Add the flash params in sf_params.c. 3. This flash support 2K block erase, add this flag. 4. The status command is 0xD7, different from others. It's polling status bit is Bit 7 -> 0 Device is busy with an internal operation. -> 1 Device is ready. This patch has been tested on mx7d 19x19 ddr3 arm2 board. And tested on mx7d 12x12 lpddr3 board. All works fine. Note: Since this flash is only 256KB, we can not test spi boot on mx7d 19x19 arm2 board. If want to test this flash, open CONFIG_SYS_USE_SPINOR. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 9b6ac1f82b09d243dc674c780abcacf0e12262c2) Conflicts: drivers/mtd/spi/sf_internal.h drivers/mtd/spi/sf_params.c drivers/mtd/spi/sf_probe.c include/spi_flash.h Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10453 mmc: fix possible unintialized ocrPeng Fan2015-04-29-1/+4
| | | | | | | | | | | | This commit ca4113da25b42bce44a2e7998966a47352f11613 "mmc: fix OCR Polling" does not consider cmd structure, and may leave it in uninitialized state. We can directly use op_cond_response here, since until here, op_cond_response already get the OCR value from chip. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Suggested-by: Ye.Li <B37916@freescale.com> (cherry picked from commit a033d2d43904f27778ee6a44f3e35494f9f72152)
* MLK-10774-36 mtd: spi: check return value of spi_setup_slavePeng Fan2015-04-29-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Need to check value of spi_setup_slave and spi_setup_slave_fdt. If their return value 'bus' is NULL, there is no need to pass it to following spi_flash_probe_tail. If 'bus' is null, the original function flow is as following: spi_flash_probe |->spi_setup_slave |->spi_probe_bus_tail |->spi_flash_probe_slave |->spi_free_slave Alougth check the pointer in spi_free_slave is ok, checking the return value of spi_setup_slave and spi_setup_slave_fdt is better. Before this fix: " => sf probe 0:2 FSL_QSPI: Not a valid cs ! SF: Failed to set up slave data abort pc : [<fff66dcc>] lr : [<fff7628c>] reloc pc : [<87814dcc>] lr : [<8782428c>] sp : fdf4fcf0 ip : e630396c fp : fe0d0888 r10: fffa2538 r9 : fdf4feb8 r8 : 02625a00 r7 : 00000002 r6 : fff94ec0 r5 : 00000000 r4 : 9355553c r3 : 1af0593c r2 : cb3fe030 r1 : fff94eb8 r0 : e59ff018 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... " After this fix: " => sf probe 0:2 FSL_QSPI: Not a valid cs ! Failed to initialize SPI flash at 0:2 " No data abort using this patch. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-35 imx:mx7 use power_init_boardPeng Fan2015-04-29-0/+33
| | | | | | | Upgrade to upstream way, using power_init_board. Add pfuze300 support. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10445 mmc: fix OCR PollingPeng Fan2015-04-29-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If in mmc_send_op_cond, OCR_BUSY is set in CMD1's response, then state is transfered to Ready state, and there is no need to send CMD1 again. Otherwise following CMD1 will recieve no response, or timeour error from driver such as fsl_esdhc.c. If not into Ready state in previous CMD1, then continue CMD1 command. In mmc_complete_op_cond, we use the value mmc->op_cond_response from mmc_send_op_cond, since there should be no CMD1 command between mmc_send_op_cond and mmc_complete_op_cond Before fixing this, uboot log shows: " CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:8 ARG 0x000001AA MMC_RSP_R1,5,6,7 0x18EC1504 CMD_SEND:55 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x18EC1504 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:1 ARG 0x00000000 MMC_RSP_R3,4 0x00FF8080 CMD_SEND:1 ARG 0x40300000 MMC_RSP_R3,4 0xC0FF8080 --> Already OCR_BUSY set CMD_SEND:1 ARG 0x40300000 MMC_RSP_R3,4 0x0096850A --> Failed CMD1 MMC init failed " Using this patch, this issue is fixed, emmc can be detected correctly. This issue exists on mx7dsabresd and mx7d_12x12_lpddr3_arm2 board. Upstream Patchwork: https://patchwork.ozlabs.org/patch/451775/ Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit ca4113da25b42bce44a2e7998966a47352f11613) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10385-2 imx: nand: Update GPMI NAND driver to support MX7DYe.Li2015-04-29-1/+1
| | | | | | | | Update GPMI NAND driver and BCH head file with definitions for CONFIG_MX7 Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 9c50677dac30085742ef216b9f2e19308e123d2b) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10385-1 imx: apbh_dma: Update APBH-DMA for MX7DYe.Li2015-04-29-2/+2
| | | | | | | | Update APBH-DMA driver and head files with definitions for CONFIG_MX7 Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 07299056426f1f25aab51ab5531c4846d4c7560f) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* ENGR00315499-19 Fix eMMC fast boot hang issueYe.Li2015-04-29-9/+28
| | | | | | | | | | | | | | | | | | When booting in eMMC fast boot, the uboot v2013.04 always hangs. The root cause is that MMC host does not exit from boot mode after bootrom loading image. So the first command 'CMD0' sent in uboot will pull down the CMD line to low and cause errors. This patch cleans the MMC boot register in "mmc_init" to put the MMC host back to normal mode. Signed-off-by: Ye Li <b37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit 2ead2f9501c6d2571e0f5365bd808ed7c73257ef) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: drivers/mmc/fsl_esdhc.c
* MLK-10363-1 udc: Update i.MX udc driver to support MX7Ye.Li2015-04-29-6/+7
| | | | | | | | | Update driver codes and registers define for MX7. Implement udc callback function in MX7 arch. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit e55c4f7bf5a66b34c2d01c42bac667cb3789b0c1) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-33 imx:mx6 add udc and fastboot supportPeng Fan2015-04-29-0/+2327
| | | | | | | | | | | | Add udc and fastboot support We did not use the upstream way. Currently use CI_UDC and USB_GAGDET of upstream can make fastboot work, but lack of flash operation, so we still use our way. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-10774-30 imx:mx7 dm thermal driver supportPeng Fan2015-04-29-0/+85
| | | | | | Add thermal driver for mx7 Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-29 imx:thermal change from CONFIG_IMX6_THERMAL to CONFIG_IMX_THERMALPeng Fan2015-04-29-1/+1
| | | | | | Change macro name to make driver support more platforms. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-28 imx:thermal Fix temperature checking issuePeng Fan2015-04-29-2/+2
| | | | | | | This patch is from commit c83c6cc7dedf9759bf193044ff5c3572d5f6afd2 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-10215 Add elan init in i.MX6SL-EVK boardHaibo Chen2015-04-29-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | EPDC board contain a elan touch screen, this screen is a i2c slave. If this EPDC board connect to i.MX6SL-EVK board, after uboot boot up, if we do i2c operation, like i2c probe, then the i2c bus block. This is due to the elan touch screen i2c slave. This device needs to do some initialization opearation before its i2c operation, otherwise this i2c device pull down the i2c clk line, and make the i2c bus hang. This means elan needs a special flow on i2c before its address is acked, otherwise the i2c bus will be hang. This patch is a workaround, it add a void function which is defined as a weak symbol in i2c driver, and it is called before every i2c operation. In mx6slevk, this function was overwrite to execute elan initialization. So that, for mx6slevk board, it will initialize elan before every i2c operation, but for other boards, it just work as before. Signed-off-by: Haibo Chen <haibo.chen@freescale.com> (cherry picked from commit 4c587b29c423ce61b2471ed20f31ff533d9d8a39) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: arch/arm/include/asm/arch-mx6/mx6sl_pins.h board/freescale/mx6slevk/mx6slevk.c
* MLK-10178-10 mtd:nand:mxs fix potential dcache issuePeng Fan2015-04-29-1/+7
| | | | | | | | | | | DCIMVAC is upgraded to DCCIMVAC for the individual processor (Cortex-A7) that the DCIMVAC is executed on. We should follow the linux dma follow. Before DMA read, first invalidate dcache then after DMA read, invalidate dcache again. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit dddb52ebdc6c4919da0103a364563dbe2c100874)
* MLK-10178-8 mmc:fsl_esdhc fix dcache issuePeng Fan2015-04-29-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | DCIMVAC is upgraded to DCCIMVAC for the individual processor (Cortex-A7) that the DCIMVAC is executed on. We should follow the linux dma follow. Before DMA read, first invalidate dcache then after DMA read, invalidate dcache again. With the DMA direction DMA_FROM_DEVICE, the dcache need be invalidated again after the DMA completion. The reason is that we need explicity make sure the dcache been invalidated thus to get the DMA'ed memory correctly from the physical memory. Any cache-line fill during the DMA operations such as the pre-fetching can cause the DMA coherency issue, thus CPU get the stale data. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> (cherry picked from commit 13cdb96bc52b3079ba91a08c1704307e5598ee59) Conflicts: drivers/mmc/fsl_esdhc.c
* MLK-10178-7 imx:wdog add imx7 supportPeng Fan2015-04-29-1/+1
| | | | | | | | | | Add mx7 in driver/watchdog/Makefile to support watchdog driver for imx7 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 19d698109fd136586b292430989e0f6edb723db6) Conflicts: drivers/watchdog/Makefile
generated by cgit v1.1 at 2024-11-18 18:12:22 +0000