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* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-10-08-10/+157
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| * power: pmic: add Ricoh RN5T567 PMIC supportStefan Agner2016-10-07-0/+73
| | | | | | | | | | | | | | | | Add device model enabled PMIC driver for Ricoh RN5T567 PMIC used on Colibri iMX7. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pinctrl: imx: do not announce driver initializationStefan Agner2016-10-07-1/+1
| | | | | | | | | | | | | | | | It is not usual that drivers announce when they have been initialized. use dev_dbg to announce device initialization. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: imx: serial: support device treeStefan Agner2016-10-07-2/+30
| | | | | | | | | | | | | | | | Support instatiation through device tree. Also parse the fsl,dte-mode property to determine whether DTE mode shall be used. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: intialize dev when probePeng Fan2016-10-04-0/+1
| | | | | | | | | | | | | | | | | | | | | | Need to initialize mmc->dev when probe, or will met "dev_get_uclass_priv: null device", when `mmc dev 1`. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pinctrl: imx6: support i.MX6ULLPeng Fan2016-10-04-0/+5
| | | | | | | | | | | | | | | | | | There two iomuxc for i.MX6ULL. one iomuxc is compatible is i.MX6UL, the other iomuxc is for SVNS usage, similar with the one in mx7. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Simon Glass <sjg@chromium.org>
| * imx: ocotp: support i.MX6ULLPeng Fan2016-10-04-6/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX6ULL has two 128 bits fuse banks, bank 7 and bank 8, while other banks use 256 bits. So we have to adjust the word and bank index when accessing the bank 8. When in command line `fuse read 8 0 1`, you can image `fuse read 7 4 1` in the ocotp driver implementation for 6ULL. When programming, we use word index, so need to fix bank7/8 programming for i.mx6ull. For example: fuse prog 8 3 1; The word index is (8 << 3 | 3) --> 67. But actully it should be (7 << 3 | 7) ---> 63. So fix it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * imx_watchdog: Do not assert WDOG_B on watchdog initRoss Parker2016-10-04-1/+1
| | | | | | | | | | | | | | | | Currently the driver asserts WDOG_B by clearing WCR_WDA bit when enabling the watchdog. Do not clear WCR_WDA. Signed-off-by: Ross Parker <rossjparker@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* | spl: saveenv: adding saveenv support in SPLB, Ravi2016-10-08-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default saveenv option is not supported for SPL. This patch enable the support for save environment variable for SPL build. Enable save environment support in SPL after setenv. By default the saveenv option is not provided in SPL, but some boards need this support in 'Falcon' boot, where SPL need to boot from different images based on environment variable set by OS. For example OS may set "reboot_image" environment variable to "recovery" inorder to boot recovery image by SPL. The SPL read "reboot_image" and act accordingly and change the reboot_image to default mode using setenv and save the environemnt. Signed-off-by: Ravi Babu <ravibabu@ti.com> Reviewed-by: Simon Glass <sig@chromium.org> change in v1: - dropped SUPPORT, use CONFIG_SPL_SAVEENV - updates the comments in mmc_private.h
* | cros_ec: Honor the google,remote-bus dt propertyMoritz Fischer2016-10-08-3/+26
| | | | | | | | | | | | | | | | | | | | | | | | Boards where ECs that use a I2C port != 0 specify this in the devicetree file via the google,remote-bus property. Previously this was ignored and hardcoded to port 0. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: u-boot@lists.denx.de Acked-by: Simon Glass <sjg@chromium.org>
* | Revert "ns16650: Make sure we have CONFIG_CLK set before using infrastructure"Masahiro Yamada2016-10-08-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 82f5279b0cd99a9163d34cfe926d0316d9dc0d37. The build failure of k2*evm boards was fixed in a different way by the previous commit. It is nasty to patch generic drivers around with #ifdef CONFIG_CLK just for the KeyStone's matter. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | PWM: Correct misspellings of "module" in context of PWMRobert P. J. Day2016-10-06-3/+3
| | | | | | | | | | Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Acked-by: Heiko Schocher <hs@denx.de>
* | Various, accumulated typos collected from around the tree.Robert P. J. Day2016-10-06-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix various misspellings of: * deprecated * partition * preceding,preceded * preparation * its versus it's * export * existing * scenario * redundant * remaining * value * architecture Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | spl: Update ext functions to take an spl_image parameterSimon Glass2016-10-06-4/+5
| | | | | | | | | | | | | | Update the ext loader to avoid using the spl_image global variable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | spi: Move freescale-specific code into a private headerSimon Glass2016-10-06-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | At present there are two SPI functions only used by freescale which are defined in the spi_flash.h header. One function name matches an existing generic SPL function. Move these into a private header to avoid confusion. Arcturus looks like it does not actually support SPI, so drop the SPI code from that board. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | spl: Convert spl_spi_load_image() to use linker listSimon Glass2016-10-06-1/+3
| | | | | | | | | | | | | | | | Add a linker list declaration for this method and remove the explicit switch() code. Also set up the sunxi function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | spl: spi: Move the generic SPI loader into common/splSimon Glass2016-10-06-124/+0
| | | | | | | | | | | | | | | | | | | | | | All the other SPL loaders are in this directory, so move the SPI one in there too. There are two board-specific SPI loaders (fsl and sunxi). These remain in the drivers/mtd/spi directory, since they do not contain generic code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | spl: Convert boot_device into a structSimon Glass2016-10-06-2/+2
| | | | | | | | | | | | | | | | | | | | | | At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | spl: Add a parameter to spl_parse_image_header()Simon Glass2016-10-06-3/+3
| | | | | | | | | | | | | | | | Instead of using the global spl_image variable, pass the required struct in as an argument. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | serial: ns16550: Handle -ENOENT when requesting clockAlexandre Courbot2016-10-06-1/+1
|/ | | | | | | | | When calling clk_get_by_index(), fall back to the legacy method of getting the clock if -ENOENT is returned. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
* Merge git://git.denx.de/u-boot-rockchipTom Rini2016-10-03-0/+170
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| * power: regulator: add pwm regulatorKever Yang2016-10-01-0/+170
| | | | | | | | | | | | | | | | add driver support for pwm regulator. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | net, macb: fix misaligned cache operation warningHeiko Schocher2016-10-01-9/+11
| | | | | | | | | | | | | | | | | | | | when using tftp on the smartweb board, it prints a lot of CACHE: Misaligned operation at range [23b2e000, 23b2e100] warnings ... fixed them. Signed-off-by: Heiko Schocher <hs@denx.de>
* | input: specify the default of I8042_KEYB in more correct mannerMasahiro Yamada2016-10-01-0/+1
|/ | | | | | | | | | Creating multiple entries of "config FOO" often gives us bad experiences. In this case, we should specify "default X86" as platforms that want this keyboard by default. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-09-30-54/+277
|\ | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/dra7xx_evm.h
| * drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controllerSriram Dash2016-09-27-0/+39
| | | | | | | | | | | | | | | | | | | | | | Currently the controller by default enables the Receive Detect feature in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive detection in P3 mode. Enabling the USB3 controller to configure USB in P2 mode whenever the Receive Detect feature is required. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * usb: fsl: Renaming fdt_fixup_erratum and fdt_fixup_usb_erratumSriram Dash2016-09-27-22/+23
| | | | | | | | | | | | | | | | The functions fdt_fixup_erratum and fdt_fixup_usb_erratum are fsl/nxp specific. So, make them explicit by renaming them fsl_fdt_fixup_erratum and fsl_fdt_fixup_usb_erratum Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
| * usb: fsl: Rename fdt_fixup_dr_usbSriram Dash2016-09-27-1/+1
| | | | | | | | | | | | | | | | The function fdt_fixup_dr_usb is specific to fsl/nxp. So, make the function name explicit and rename fdt_fixup_dr_usb into fsl_fdt_fixup_dr_usb. Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
| * usb: host: ehci-vf: Migrate Vybrid USB to driver modelSanchayan Maity2016-09-27-7/+201
| | | | | | | | | | | | Add driver model support for Vybrid USB driver. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
| * drivers: usb: xhci-fsl: Change burst beat and outstanding pipelined ↵Sriram Dash2016-09-27-0/+10
| | | | | | | | | | | | | | | | | | | | | | transfers requests This is required for better performance, and performs below tuning: 1. Enable burst length set, and define it as 4/8/16. 2. Set burst request limit to 16 requests. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
| * net: asix: Fix ASIX 88772B with driver modelAlban Bedel2016-09-27-24/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 147271209a9d ("net: asix: fix operation without eeprom") added a special handling for ASIX 88772B that enable another type of header. This break the driver in DM mode as the extra handling needed in the receive path is missing. However this new header mode is not required and only seems to increase the code complexity, so this patch revert this part of commit 147271209a9d. This also reverts commit 41d1258aceb45b45f9e68f67a9c40f0afbc09dc9 ("net: asix: Fix AX88772B when used with DriverModel") of late. Fixes: 147271209a9d ("net: asix: fix operation without eeprom") Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
* | mpc85xx: powerpc: usb: Update the list of Socs afftected by erratum A006261Sriram Dash2016-09-28-9/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Apply the erratum A006261 for the following Socs: P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1 Do not apply erratum A006261 for the following Socs: T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081 Erratum A006261 is applicable for the following Socs: P1010(1.0, 2.0), P2041(1.0, 1.1, 2.0, 2.1), P2040(1.0, 1.1, 2.0, 2.1), P3041(1.0, 1.1, 2.0, 2.1), P5010(1.0, 2.0), P5020(1.0, 2.0), P5021(1.0, 2.0), T4240(1.0, 2.0), P5040(1.0,2.0,2.1). Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-09-27-382/+488
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| * | ARM: tegra: fix USB ULPI PHY reset signal inversion confusionStephen Warren2016-09-27-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB ULPI PHY reset signals are typically active low. Consequently, they should be marked as GPIO_ACTIVE_LOW in device tree, and indeed they are in the Linux kernel DTs, and in DT properties that U-Boot doesn't yet use. However, in DT properties that U-Boot does use, the value has been set to 0 (== GPIO_ACTIVE_HIGH) to work around a bug in U-Boot. This change fixes the DT to correctly represent the HW, and fixes the Tegra USB driver to cope with the fact that dm_gpio_set_value() internally handles any inversions implied by the DT value GPIO_ACTIVE_LOW. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | i2c: tegra: only use new clock/reset APIsStephen Warren2016-09-27-57/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the standard clock/reset APIs are available for all Tegra SoCs, convert the I2C driver to use them exclusively, and remove any references to the custom Tegra-specific APIs. Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | mmc: tegra: only use new clock/reset APIsStephen Warren2016-09-27-40/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the standard clock/reset APIs are available for all Tegra SoCs, convert the MMC driver to use them exclusively, and remove any references to the custom Tegra-specific APIs. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | clock: implement a driver for the Tegra CARStephen Warren2016-09-27-0/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a clock uclass driver for the Tegra CAR. This allows clients to use standard clock APIs on Tegra. This device is intended to be instantiated by the core Tegra CAR driver, rather than being instantiated directly from DT. The implementation uses the existing custom Tegra- specific clock APIs to avoid coupling the series with significant refactoring of the existing Tegra clock/clock code. The driver currently only supports peripheral clocks, and avoids support for other clocks such as PLLs and external clocks. This should be sufficient to convert over all Tegra peripheral drivers, and avoids a complex implementation which calls different Tegra-specific clock APIs based on the type of clock being manipulated. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | reset: implement a driver for the Tegra CARStephen Warren2016-09-27-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a reset uclass driver for the Tegra CAR. This allows clients to use standard reset APIs on Tegra. This device is intended to be instantiated by the core Tegra CAR driver, rather than being instantiated directly from DT. The implementation uses the existing custom Tegra- specific reset APIs to avoid coupling the series with significant refactoring of the existing Tegra clock/reset code. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | misc: implement Tegra CAR core driverStephen Warren2016-09-27-0/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra CAR (Clock And Reset) module provides control of most clocks and reset signals within the Tegra SoC. This change implements a driver for this module. However, since the module implements multiple kinds of services (clocks, resets, perhaps more), all this driver does is bind various sub-devices, which in turn provide the real services. This driver is essentially an "MFD" (Multi-Function Device) in Linux kernel speak. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | mmc: tegra: Add DM_MMC support to Tegra MMC driverTom Warren2016-09-27-208/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the Tegra MMC driver to DM_MMC. Support for non-DM is removed to avoid ifdefs in the code. DM_MMC is now enabled for all Tegra builds. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Warren <twarren@nvidia.com> (swarren, fixed some NULL pointer dereferences, removed extraneous changes, rebased on various other changes, removed non-DM support etc.) Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | mmc: tegra: priv struct and naming cleanupStephen Warren2016-09-27-138/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct mmc_host is a Tegra-specific structure, but the name implies it's something defined by core MMC code, which is confusing. Rename it to struct tegra_mmc_priv to make its purpose more obvious. The new name is also more appropriate for a DM driver private data structure, which will be relevant later in this series. Nothing needs access to this type except the MMC driver itself. Move the definition into the driver C file. Make sure all Tegra MMC functions are named tegra_mmc_*. Even though they're all static, it's useful to have good naming so that symbol tables are easy to interpret. A few functions aren't renamed by this patch since they'll be deleted by a subsequent patch in this series. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | mmc: tegra: don't use periph_id in pad_init_mmc()Stephen Warren2016-09-27-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MMC driver will soon be converted to use standard clock/reset APIs, and so the periph_id field in the MMC device priv struct will disappear. Rework the implementation of pad_init_mmc() to rely on this; using the device register address is a much more direct test anyway. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | mmc: tegra: move pad_init_mmc() into MMC driverStephen Warren2016-09-27-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pad_init_mmc() is performing an SoC-specific operation, using registers within the MMC controller. There's no reason to implement this code outside the MMC driver, so move it inside the driver. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | mmc: tegra: use correct alias for SDHCI/MMC nodesStephen Warren2016-09-27-5/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra MMC driver currently honors "sdhci" entries in /aliases. The MMC core however uses "mmc" entries in /aliases. This difference will be relevant once the Tegra MMC driver is converted to DM, and the MMC core handles alias lookups. To avoid issues during that conversion, fix the Tegra MMC driver and all Tegra DTs to use the same alias name as the MMC core does. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-09-27-16/+4691
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| * | ahci: Make ahci_port_base() non-static to enable overwriteStefan Roese2016-09-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To allow a board- / platform-specific ahci_port_base() function, this patch removes "static inline" and adds __weak to this function. This will be used by the upcoming Armada 7K/8K SATA / AHCI support, which unfortunately needs a different port base address calculation. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | usb: xhci-mvebu: Add Armada 8K to compatiblity listStefan Roese2016-09-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable this driver on Armada 7K/8K this patch adds the compatibility property to the list. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | drivers/phy: Add Marvell SerDes / PHY drivers used on Armada 7K/8KStefan Roese2016-09-27-2/+1904
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This version is based on the Marvell U-Boot version with this patch applied as latest patch: Git ID 7f408573: "fix: comphy: cp110: add comphy initialization for usb device mode" from 2016-07-05. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | drivers/phy: Add Marvell SerDes / PHY drivers used on Armada 3kStefan Roese2016-09-27-0/+2092
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This version is based on the Marvell U-Boot version with this patch applied as latest patch: Git ID 7f408573: "fix: comphy: cp110: add comphy initialization for usb device mode" from 2016-07-05. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * | usb: ehci: ehci-marvell.c: Add Armada 3700 support (ARMv8)Stefan Roese2016-09-27-7/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds DM based support for the Armada 3700 EHCI controller. The address windows don't need to get configured in this case. The difference here is detected via DT compatible property at runtime. With this support and the DM xHCI driver, both XHCI and eHCI can be used simultaniously on the MVEBU boards now. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Acked-by: Marek Vasut <marex@denx.de>
generated by cgit v1.1 at 2024-07-05 14:04:54 +0000