Merge branch 'master' of git://www.denx.de/git/u-boot-imx

9 files changed, 157 insertions, 10 deletions

diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c
index 6b8566c..8a100c1 100644
--- a/drivers/misc/mxc_ocotp.c
+++ b/drivers/misc/mxc_ocotp.c
@@ -18,6 +18,7 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
+#include <asm/imx-common/sys_proto.h>
 
 #define BO_CTRL_WR_UNLOCK		16
 #define BM_CTRL_WR_UNLOCK		0xffff0000
@@ -61,6 +62,8 @@
 #define FUSE_BANK_SIZE	0x80
 #ifdef CONFIG_MX6SL
 #define FUSE_BANKS	8
+#elif defined(CONFIG_MX6ULL)
+#define FUSE_BANKS	9
 #else
 #define FUSE_BANKS	16
 #endif
@@ -72,11 +75,11 @@
 #endif
 
 #if defined(CONFIG_MX6)
-#include <asm/arch/sys_proto.h>
 
 /*
  * There is a hole in shadow registers address map of size 0x100
- * between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL.
+ * between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX,
+ * iMX6UL and i.MX6ULL.
  * Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses,
  * we should account for this hole in address space.
  *
@@ -97,7 +100,10 @@ u32 fuse_bank_physical(int index)
 
 	if (is_mx6sl()) {
 		phy_index = index;
-	} else if (is_mx6ul()) {
+	} else if (is_mx6ul() || is_mx6ull()) {
+		if (is_mx6ull() && index == 8)
+			index = 7;
+
 		if (index >= 6)
 			phy_index = fuse_bank_physical(5) + (index - 6) + 3;
 		else
@@ -112,11 +118,27 @@ u32 fuse_bank_physical(int index)
 	}
 	return phy_index;
 }
+
+u32 fuse_word_physical(u32 bank, u32 word_index)
+{
+	if (is_mx6ull()) {
+		if (bank == 8)
+			word_index = word_index + 4;
+	}
+
+	return word_index;
+}
 #else
 u32 fuse_bank_physical(int index)
 {
 	return index;
 }
+
+u32 fuse_word_physical(u32 bank, u32 word_index)
+{
+	return word_index;
+}
+
 #endif
 
 static void wait_busy(struct ocotp_regs *regs, unsigned int delay_us)
@@ -142,6 +164,14 @@ static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word,
 		return -EINVAL;
 	}
 
+	if (is_mx6ull()) {
+		if ((bank == 7 || bank == 8) &&
+		    word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 3) {
+			printf("mxc_ocotp %s(): Invalid argument on 6ULL\n", caller);
+			return -EINVAL;
+		}
+	}
+
 	enable_ocotp_clk(1);
 
 	wait_busy(*regs, 1);
@@ -176,14 +206,16 @@ int fuse_read(u32 bank, u32 word, u32 *val)
 	struct ocotp_regs *regs;
 	int ret;
 	u32 phy_bank;
+	u32 phy_word;
 
 	ret = prepare_read(&regs, bank, word, val, __func__);
 	if (ret)
 		return ret;
 
 	phy_bank = fuse_bank_physical(bank);
+	phy_word = fuse_word_physical(bank, word);
 
-	*val = readl(&regs->bank[phy_bank].fuse_regs[word << 2]);
+	*val = readl(&regs->bank[phy_bank].fuse_regs[phy_word << 2]);
 
 	return finish_access(regs, __func__);
 }
@@ -237,7 +269,13 @@ static void setup_direct_access(struct ocotp_regs *regs, u32 bank, u32 word,
 #ifdef CONFIG_MX7
 	u32 addr = bank;
 #else
-	u32 addr = bank << 3 | word;
+	u32 addr;
+	/* Bank 7 and Bank 8 only supports 4 words each for i.MX6ULL */
+	if ((is_mx6ull()) && (bank > 7)) {
+		bank = bank - 1;
+		word += 4;
+	}
+	addr = bank << 3 | word;
 #endif
 
 	set_timing(regs);
@@ -325,14 +363,16 @@ int fuse_override(u32 bank, u32 word, u32 val)
 	struct ocotp_regs *regs;
 	int ret;
 	u32 phy_bank;
+	u32 phy_word;
 
 	ret = prepare_write(&regs, bank, word, __func__);
 	if (ret)
 		return ret;
 
 	phy_bank = fuse_bank_physical(bank);
+	phy_word = fuse_word_physical(bank, word);
 
-	writel(val, &regs->bank[phy_bank].fuse_regs[word << 2]);
+	writel(val, &regs->bank[phy_bank].fuse_regs[phy_word << 2]);
 
 	return finish_access(regs, __func__);
 }
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 103b32e..9796d39 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -1010,6 +1010,7 @@ static int fsl_esdhc_probe(struct udevice *dev)
 	}
 
 	upriv->mmc = priv->mmc;
+	priv->mmc->dev = dev;
 
 	return 0;
 }
diff --git a/drivers/pinctrl/nxp/pinctrl-imx.c b/drivers/pinctrl/nxp/pinctrl-imx.c
index 40b0616..949d0f3 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx.c
@@ -222,7 +222,7 @@ int imx_pinctrl_probe(struct udevice *dev,
 			return -ENOMEM;
 	}
 
-	dev_info(dev, "initialized IMX pinctrl driver\n");
+	dev_dbg(dev, "initialized IMX pinctrl driver\n");
 
 	return 0;
 }
diff --git a/drivers/pinctrl/nxp/pinctrl-imx6.c b/drivers/pinctrl/nxp/pinctrl-imx6.c
index 24f139e..32b4754 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx6.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx6.c
@@ -12,6 +12,10 @@
 
 static struct imx_pinctrl_soc_info imx6_pinctrl_soc_info;
 
+static struct imx_pinctrl_soc_info imx6_snvs_pinctrl_soc_info = {
+	.flags = ZERO_OFFSET_VALID,
+};
+
 static int imx6_pinctrl_probe(struct udevice *dev)
 {
 	struct imx_pinctrl_soc_info *info =
@@ -26,6 +30,7 @@ static const struct udevice_id imx6_pinctrl_match[] = {
 	{ .compatible = "fsl,imx6sl-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info },
 	{ .compatible = "fsl,imx6sx-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info },
 	{ .compatible = "fsl,imx6ul-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info },
+	{ .compatible = "fsl,imx6ull-iomuxc-snvs", .data = (ulong)&imx6_snvs_pinctrl_soc_info },
 	{ /* sentinel */ }
 };
 
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index 69f8d51..13d293a 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -127,6 +127,14 @@ config PMIC_S5M8767
 	driver provides basic register access and sets up the attached
 	regulators if regulator support is enabled.
 
+config PMIC_RN5T567
+	bool "Enable driver for Ricoh RN5T567 PMIC"
+	depends on DM_PMIC
+	---help---
+	The RN5T567 is a PMIC with 4 step-down DC/DC converters, 5 LDO
+	regulators Real-Time Clock and 4 GPIOs. This driver provides
+	register access only.
+
 config PMIC_TPS65090
 	bool "Enable driver for Texas Instruments TPS65090 PMIC"
 	depends on DM_PMIC
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index 52b4f71..37d9eb5 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
 obj-$(CONFIG_PMIC_ACT8846) += act8846.o
 obj-$(CONFIG_PMIC_PM8916) += pm8916.o
 obj-$(CONFIG_PMIC_RK808) += rk808.o
+obj-$(CONFIG_PMIC_RN5T567) += rn5t567.o
 obj-$(CONFIG_PMIC_TPS65090) += tps65090.o
 obj-$(CONFIG_PMIC_S5M8767) += s5m8767.o
 
diff --git a/drivers/power/pmic/rn5t567.c b/drivers/power/pmic/rn5t567.c
new file mode 100644
index 0000000..001e695
--- /dev/null
+++ b/drivers/power/pmic/rn5t567.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2016 Toradex AG
+ * Stefan Agner <stefan.agner@toradex.com>
+ *
+ * SPDX-License-Identifier:      GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <libfdt.h>
+#include <power/rn5t567_pmic.h>
+#include <power/pmic.h>
+
+static int rn5t567_reg_count(struct udevice *dev)
+{
+	return RN5T567_NUM_OF_REGS;
+}
+
+static int rn5t567_write(struct udevice *dev, uint reg, const uint8_t *buff,
+			  int len)
+{
+	int ret;
+
+	ret = dm_i2c_write(dev, reg, buff, len);
+	if (ret) {
+		debug("write error to device: %p register: %#x!", dev, reg);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rn5t567_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+	int ret;
+
+	ret = dm_i2c_read(dev, reg, buff, len);
+	if (ret) {
+		debug("read error from device: %p register: %#x!", dev, reg);
+		return ret;
+	}
+
+	return 0;
+}
+
+static struct dm_pmic_ops rn5t567_ops = {
+	.reg_count = rn5t567_reg_count,
+	.read = rn5t567_read,
+	.write = rn5t567_write,
+};
+
+static const struct udevice_id rn5t567_ids[] = {
+	{ .compatible = "ricoh,rn5t567" },
+	{ }
+};
+
+U_BOOT_DRIVER(pmic_rn5t567) = {
+	.name = "rn5t567 pmic",
+	.id = UCLASS_PMIC,
+	.of_match = rn5t567_ids,
+	.ops = &rn5t567_ops,
+};
diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
index 8545714..4fd2b1d 100644
--- a/drivers/serial/serial_mxc.c
+++ b/drivers/serial/serial_mxc.c
@@ -108,6 +108,8 @@
 #define  UTS_RXFULL	 (1<<3)	 /* RxFIFO full */
 #define  UTS_SOFTRST	 (1<<0)	 /* Software reset */
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifndef CONFIG_DM_SERIAL
 
 #ifndef CONFIG_MXC_UART_BASE
@@ -135,8 +137,6 @@
 #define UBRC  0xac /* Baud Rate Count Register */
 #define UTS   0xb4 /* UART Test Register (mx31) */
 
-DECLARE_GLOBAL_DATA_PTR;
-
 #define TXTL  2 /* reset default */
 #define RXTL  1 /* reset default */
 #define RFDIV 4 /* divide input clock by 2 */
@@ -347,9 +347,37 @@ static const struct dm_serial_ops mxc_serial_ops = {
 	.setbrg = mxc_serial_setbrg,
 };
 
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+static int mxc_serial_ofdata_to_platdata(struct udevice *dev)
+{
+	struct mxc_serial_platdata *plat = dev->platdata;
+	fdt_addr_t addr;
+
+	addr = dev_get_addr(dev);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	plat->reg = (struct mxc_uart *)addr;
+
+	plat->use_dte = fdtdec_get_bool(gd->fdt_blob, dev->of_offset,
+					"fsl,dte-mode");
+	return 0;
+}
+
+static const struct udevice_id mxc_serial_ids[] = {
+	{ .compatible = "fsl,imx7d-uart" },
+	{ }
+};
+#endif
+
 U_BOOT_DRIVER(serial_mxc) = {
 	.name	= "serial_mxc",
 	.id	= UCLASS_SERIAL,
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+	.of_match = mxc_serial_ids,
+	.ofdata_to_platdata = mxc_serial_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct mxc_serial_platdata),
+#endif
 	.probe = mxc_serial_probe,
 	.ops	= &mxc_serial_ops,
 	.flags = DM_FLAG_PRE_RELOC,
diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c
index 2938d9f..3f826d1 100644
--- a/drivers/watchdog/imx_watchdog.c
+++ b/drivers/watchdog/imx_watchdog.c
@@ -34,7 +34,7 @@ void hw_watchdog_init(void)
 #endif
 	timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
 	writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS |
-		SET_WCR_WT(timeout), &wdog->wcr);
+		WCR_WDA | SET_WCR_WT(timeout), &wdog->wcr);
 	hw_watchdog_reset();
 }
 #endif