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* Revert "stm32f4: fix serial output"Tom Rini2015-05-10-3/+0
| | | | | | | | | As per the author, we don't need this patch really since the other patch "stm32f4: fix serial output" superseded it. This reverts commit 85e5f5b7a7f8d889271f94791606cde62d81d53f. Signed-off-by: Tom Rini <trini@konsulko.com>
* serial: fdt: add device tree support for pl01xVikas Manocha2015-05-10-1/+29
| | | | | | | This patch adds device tree support for arm pl010/pl011 driver. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Acked-by: Simon Glass <sjg@chromium.org>
* stm32f4: add serial print portkunhuahuang2015-05-10-12/+59
| | | | | | | | | | | | Add the stm32F4 board's serial ports support. User can use it easily. The user only need to edit the number of the usart. The patch also fix the serial print out. Last, this version of patch fix the first patch checkpatch.pl error. Thanks to Kamil Lulko. Signed-off-by: kunhuahuang <huangkunhua@gmail.com>
* stm32f4: fix serial outputkunhuahuang2015-05-10-0/+4
| | | | | | | | | This patch fix the serial output. The source is from Kamil Lulko's "stm32f429-discovery board support" Thanks, Varcain. I learned a lot. Signed-off-by: kunhuahuang <huangkunhua@gmail.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2015-05-05-21/+173
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| * Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-04-29-1/+7
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| | * serial: zynq: Add support for slow emulation platformMichal Simek2015-04-29-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | On slow platforms not all baudrate setting is valid. Check it directly in the driver and setup maximum possible frequency. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | serial: ns16550: Remove hard-coded baud_divisor settingAxel Lin2015-04-28-1/+0
| |/ | | | | | | | | | | | | | | | | This was accidentally added by commit dd0b0122bacc "serial: ns16550: Add an option to specify the debug UART register shift". Remove it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Simon Glass <sjg@chromium.org>
| * Merge branch 'master' of git://git.denx.de/u-boot-dmTom Rini2015-04-23-16/+32
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| | * dm: Add a panic_str() function to reduce code sizeSimon Glass2015-04-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The printf() in panic() adds about 1.5KB of code size to SPL when compiled with Thumb-2. Provide a smaller version that does not support printf()-style arguments and use it in two commonly compiled places. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * serial: ns16550: Remove unnecessary init on UART setupSimon Glass2015-04-22-1/+0
| | | | | | | | | | | | | | | | | | | | | It is not necessary to write a zero baud rate to the device, and for some chips this will cause problems. Drop this code. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * dm: ns16550: Support non-byte register spacing with driver modelSimon Glass2015-04-22-4/+6
| | | | | | | | | | | | | | | | | | | | | Allow this driver to support boards where the register shift is not 0. This fixes some compiler warnings which appear in that case. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * serial: ns16550: Add an option to specify the debug UART register shiftSimon Glass2015-04-22-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | This UART permits different register spacing. To support the debug UART on devices which have a spacing other than 1 byte, allow the shift value to be specified. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | stm32f4: Add serial driverrev13@wp.pl2015-04-22-0/+120
| |/ | | | | | | | | Signed-off-by: Kamil Lulko <rev13@wp.pl> Reviewed-by: Tom Rini <trini@konsulko.com>
| * serial: pl01x: fix PL010 regressionLinus Walleij2015-04-21-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit aed2fbef5e9a0ab5a7cd01e742039a962f0b24ef "dm: serial: Tidy up the pl01x driver" caused a regression on (real hardware) PL010 by omitting to update the line control register when switching baudrate. Fix this by inlining the missing write to the baud control register. Also renaming the set_line_control() function to pl011_set_line_control() since this function is clearly PL011-specific, and it won't suffice to call that to set up line control. Tested on the Integrator/AP hardware. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * common: Make sure arch-specific map_sysmem() is definedJoe Hershberger2015-04-18-0/+2
| | | | | | | | | | | | | | | | | | | | | | In the case where the arch defines a custom map_sysmem(), make sure that including just mapmem.h is sufficient to have these functions as they are when the arch does not override it. Also split the non-arch specific functions out of common.h Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: core: Add dev_get_uclass_priv() to access uclass private dataSimon Glass2015-04-16-2/+2
| | | | | | | | | | | | | | | | Add a convenience function to access the private data that a uclass stores for each of its devices. Convert over most existing uses for consistency and to provide an example for others. Signed-off-by: Simon Glass <sjg@chromium.org>
* | fix ARM DCC support for ARMv7 based cores (e.g. CortexA)Alexander Merkle2015-04-16-2/+2
|/ | | | Signed-off-by: Alexander Merkle <alexander.merkle@lauterbach.com>
* serial-arc: switch to DMAlexey Brodkin2015-04-03-32/+70
| | | | | | | | Now when all infrastructure in ARC is ready for it let's switch ARC UART to driver model. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org>
* serial/serial_arc: set registers address during compilationAlexey Brodkin2015-04-03-2/+1
| | | | | | | | | | Being global variable with 0 value it falls into .bss area which we may only use after relocation to RAM. And right afetr relocation we zero .bss - effectively cleaing register address set for early console. Now with pre-set value "regs" variable is no longer in .bss and this way safely survives relocation. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* dm: serial: remove bogus include <ns16550.h>Masahiro Yamada2015-03-25-2/+0
| | | | | | | | | | | Serial-uclass should be generically implemented without depending a particular hardware. Fortunately, nothing in include/ns16550.h is referenced from drivers/serial/serial-uclass.c, so remove this bogus include. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: UniPhier: adjust device trees for business transferMasahiro Yamada2015-03-15-3/+4
| | | | | | | Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* serial: ns16550: Fix build error due to a typoAxel Lin2015-03-02-1/+1
| | | | | | | Fix trivial typo. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Axel Lin <axel.lin@ingics.com>
* Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2015-03-01-32/+32
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| * serial: UniPhier: move LCR register setting to probe functionMasahiro Yamada2015-03-01-9/+11
| | | | | | | | | | | | | | We do not have to set the LCR register every time we change the baud-rate. We just need to set it up once in the probe function. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * serial: UniPhier: use 32 bit register accessMasahiro Yamada2015-03-01-28/+26
| | | | | | | | | | | | | | | | For PH1-Pro4, the 8 bit write access to LCR register (offset = 0x11) is not working correctly. As a side effect, it also modifies MCR register (offset = 0x10) and results in unexpected behavior. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2015-03-01-3/+4
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| * serial: sh: fix internal clock source on SCIFVladimir Barinov2015-02-25-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | The formula to calculate SCIF BRR for R-Car H2/M2/E2 SoCs is as follows: BRR = pclk / (64 * 2^(2n-1) * baudrate) - 1, the prescaler is 0 due to SCSMR settings, hence n=0 Also SCSCR must be set to use internal or external clock source. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * serial: sh: Remove invalid UTF-8 characterNobuhiro Iwamatsu2015-02-25-1/+1
| | | | | | | | | | | | | | | | serial_sh.c contains invalid UTF-8 character. This deletes the character. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | ARM: remove cm4008 and cm41xx board supportMasahiro Yamada2015-02-24-124/+0
|/ | | | | | | | These are still non-generic boards. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Greg Ungerer <greg.ungerer@opengear.com> Acked-by: Marek Vasut <marex@denx.de>
* serial: ns16550: Support debug UARTSimon Glass2015-02-19-2/+61
| | | | | | | | Add debug UART functions to permit ns16550 to provide an early debug UART. Try to avoid using the stack so that this can be called from assembler before a stack is set up (at least on ARM and PowerPC). Signed-off-by: Simon Glass <sjg@chromium.org>
* serial: ns16550: Add access functions that don't need platdataSimon Glass2015-02-19-18/+30
| | | | | | | | For the debug UART we need to be able to provide any parameters before driver model is set up. Add parameters to the low-level access functions to make this possible. Signed-off-by: Simon Glass <sjg@chromium.org>
* serial: Support an early UART for debuggingSimon Glass2015-02-19-0/+46
| | | | | | | | | | | | | | | | | | | | | This came up in a discussion on the mailing list here: https://patchwork.ozlabs.org/patch/384613/ My concerns at the time were: - it doesn't need to be written in assembler - it doesn't need to be ARM-specific This patch provides a possible alternative. It works by allowing any serial driver to export one init function and provide a putc() function. These can be used to output debug data before the real serial driver is available. This implementation does not depend on driver model, and it is possible for it to operate without a stack on some architectures (e.g. PowerPC, ARM). It provides the same features as the ARM-specific debug.S but with more UART and architecture support. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add support for all targets which requires MANUAL_RELOCMichal Simek2015-02-12-0/+16
| | | | | | | | | | Targets with CONFIG_NEEDS_MANUAL_RELOC do not use REL/RELA relocation (mostly only GOT) where functions aray are not updated. This patch is fixing function pointers for DM core and serial-uclass to ensure that relocated functions are called. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: sh: serial: Add support driver modelNobuhiro Iwamatsu2015-02-12-113/+238
| | | | | | | | This adds driver model support with this driver. This was tested by Koelsch board and Gose board. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: Expand and complete Kconfig in drivers/Simon Glass2015-02-12-2/+4
| | | | | | | | Expand the help messages for each driver. Add missing Kconfig for I2C, SPI flash and thermal. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* powerpc: Add serial driver for driver modelSimon Glass2015-02-12-0/+41
| | | | | | | This uses the ns16550 driver but sets up the clock at run-time. It does not seem to be available in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Add a flag to control sequence numberingSimon Glass2015-01-29-0/+1
| | | | | | | | | | | | | | | | At present we try to use the 'reg' property and device tree aliases to give devices a sequence number. The 'reg' property is often actually a memory address, so the sequence numbers thus-obtained are not useful. It would be better if the devices were just sequentially numbered in that case. In fact neither I2C nor SPI use this feature, so drop it. Some devices need us to look up an alias to number them within the uclass. Add a flag to control this, so it is not done unless it is needed. Adjust the tests to test this new behaviour. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-01-26-23/+7
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| * serial: Extend structure comments with register offsetMichal Simek2015-01-26-6/+6
| | | | | | | | | | | | This information help with debugging issues with uart. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * serial: zynq: Use global baudrate instead of hardcoded oneMichal Simek2015-01-26-17/+1
| | | | | | | | | | | | This change enables to change baudrate on command line. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | x86: Use ePAPR defined properties for x86-uartBin Meng2015-01-13-1/+7
| | | | | | | | | | | | | | | | | | Use ePAPR defined properties for x86-uart: clock-frequency and current-speed. Assign the value of clock-frequency in device tree to plat->clock of x86-uart instead of using hardcoded number. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | serial: ns16550: Support ns16550 compatible pci uart devicesBin Meng2015-01-13-0/+31
|/ | | | | | | | | | | | | | There are many pci uart devices which are ns16550 compatible. We can describe them in the board dts file and use it as the U-Boot serial console as specified in the chosen node 'stdout-path' property. Those pci uart devices can have their register be memory-mapped, or i/o-mapped. The driver will try to use the memory-mapped register if the reg property in the node has an entry to describe the memory-mapped register, otherwise i/o-mapped register will be used. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Rename coreboot-serial to x86-serialBin Meng2014-12-18-7/+7
| | | | | Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: serial_pl01x: Add missing private data sizeSimon Glass2014-12-11-0/+1
| | | | | | | | | | | The private data size is missing from the driver, so we store it at 0, which causes problems when something overwrites memory at 0. Fix this. Change-Id: I6f551ee905b0064ae8343e41e46450c37c8c8c1a Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
* Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2014-12-08-4/+5
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| * ns16550.c: Fix for ns16550 driver hanging on OMAP4Gregoire Gentil2014-12-04-4/+5
| | | | | | | | | | | | | | | | The same problem that is seen on some OMAP3 is also seen on some OMAP4 so include them in the test in order to prevent some hangs during SPL. [trini: Re-word commit message, make apply cleanly] Signed-off-by: Tom Rini <trini@ti.com>
* | serial: pl01x: avoid pl01x type check two timesVikas Manocha2014-12-08-9/+6
| | | | | | | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Acked-by: Simon Glass <sjg@chromium.org>
* | serial: pl01x: disable as per type of pl01xVikas Manocha2014-12-08-3/+4
| | | | | | | | | | | | | | | | pl010 & pl011 have different control register offsets, setting it as per the pl01x type. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Acked-by: Simon Glass <sjg@chromium.org>
* | serial: pl01x: move all line control at same placeVikas Manocha2014-12-08-23/+21
| | | | | | | | | | | | | | | | Receive line control uses same setting as transmit line control, also one lcrh write is effective for both baud rate & receive line control internal update. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Acked-by: Simon Glass <sjg@chromium.org>
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