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path: root/drivers/net/zynq_gem.c
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* net: zynq: Fix MDC setting for zynqMichal Simek2015-11-19-1/+1
* net: zynq: Remove unused MDCCLKDIV2 macroMichal Simek2015-11-19-1/+0
* net: zynq: Fix mdc clock division setting for 100Mbit/sMichal Simek2015-11-19-2/+2
* net: zynq: Wait till packet is sentMichal Simek2015-11-19-1/+32
* net: zynq: Disable secondary queuesEdgar E. Iglesias2015-11-19-0/+26
* net: zynq: Add dummy packet to fix packet duplication issueMichal Simek2015-11-19-2/+8
* net: zynq: Do not report TX underrunMichal Simek2015-11-19-2/+0
* net: zynq: Setup BD when structures are filledMichal Simek2015-11-19-3/+3
* net: zynq: Allocate BD_SPACE in connection to RX_BUFMichal Simek2015-11-19-1/+1
* net: zynq: Fix clearing statisticMichal Simek2015-11-19-4/+3
* net: zynq: Extend register description with offsetsMichal Simek2015-11-19-15/+15
* net: zynq: Add support for different PHY interface typesMichal Simek2015-11-19-1/+8
* net: zynq: Add debug message to phyread/phywriteMichal Simek2015-11-19-1/+12
* driver: net: Fix pointer conversion warnings for xilinx_zynqmp_epPrabhakar Kushwaha2015-11-12-8/+8
* of: clean up OF_CONTROL ifdef conditionalsMasahiro Yamada2015-08-18-1/+1
* net: gem: Extend timeout valueMichal Simek2015-07-28-1/+1
* zynq: gem: Setting up WRAP bit for one TX bdMichal Simek2015-07-28-1/+2
* zynq: gem: Increase the Rx buffer descriptors to 32Siva Durga Prasad Paladugu2015-07-28-1/+1
* zynqmp: gem: Flush the rx buffers while transmittingSiva Durga Prasad Paladugu2015-07-28-3/+7
* zynqmp: gem: Set data bus width to 64bit for arm64Siva Durga Prasad Paladugu2015-07-28-1/+8
* net: gem: Use correct type for castingMichal Simek2015-04-20-1/+2
* net: cosmetic: Fix var naming net <-> eth driversJoe Hershberger2015-04-18-1/+1
* net: gem: Use phys_addr_t instead of int for addressesMichal Simek2015-01-21-2/+3
* net: zynq: Fix sparse warnings in gemMichal Simek2014-05-06-0/+1
* net: zynq: Use predefined macros instead of hardcoded valueMichal Simek2014-05-06-1/+2
* net: gem: Add OF initialization supportMichal Simek2014-03-04-0/+42
* net: zynq_gem: Calculate clock dividers dynamicallySoren Brinkmann2014-02-19-6/+11
* net: zynq_gem: Move RCLK details out of driverSoren Brinkmann2014-02-19-5/+2
* net: gem: Check if phy was correctly detectedMichal Simek2014-01-21-0/+5
* net: zynq_gem: Add d-cache supportSrikanth Thokala2013-11-22-29/+53
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-14-1/+1
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
* net: gem: Add support for phy autodetectionMichal Simek2013-04-30-0/+51
* net: gem: Preserve clk on emio interfaceDavid Andrey2013-04-30-3/+9
* net: gem: Pass phy address to initDavid Andrey2013-04-30-6/+2
* net: gem: Fix gem driver on 1Gbps LANMichal Simek2013-04-30-15/+38
* net: gem: Do not initialize BDs againMichal Simek2013-04-30-39/+47
* net: gem: Simplify return path in zynq_gem_recvMichal Simek2013-04-30-3/+1
* net: gem: Remove WRAP bit from TX buffer descriptionMichal Simek2013-04-30-2/+1
* net: Add driver for Zynq Gem IPMichal Simek2012-09-26-0/+440
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