summaryrefslogtreecommitdiff
path: root/drivers/net/zynq_gem.c
Commit message (Expand)AuthorAgeLines
* net: zynq: Change MDC setup for arm64Michal Simek2016-01-27-0/+4
* net: zynq_gem: Use shared wait_for_bitMateusz Kulikowski2016-01-25-33/+2
* net: gem: Add driver dependencies to PHYLIBMichal Simek2015-12-18-4/+0
* net: gem: Separate recv and free_pkt functionsMichal Simek2015-12-18-20/+32
* net: gem: Fix return value from recvMichal Simek2015-12-18-1/+1
* net: gem: Setup default phy address to -1Michal Simek2015-12-18-1/+2
* net: gem: Enable CTRL+C in wait_for_bitMichal Simek2015-12-07-0/+6
* net: gem: Read information about interface from DTMichal Simek2015-12-07-8/+12
* net: gem: Move driver to DMMichal Simek2015-12-07-69/+110
* net: gem: Fix miiphy_read nameMichal Simek2015-12-07-2/+2
* net: gem: Remove zynq_gem_of_init()Michal Simek2015-12-07-42/+0
* net: gem: Enable MDIO bus earlierMichal Simek2015-12-07-5/+9
* net: gem: Check if priv->phydev is validMichal Simek2015-12-07-0/+2
* net: gem: Extract phy init codeMichal Simek2015-12-07-17/+30
* net: gem: Remove phydev variableMichal Simek2015-12-07-13/+10
* net: gem: Change mii function not to use eth_device structureMichal Simek2015-12-07-13/+19
* net: gem: Change mdio_wait prototype to pass regsMichal Simek2015-12-07-4/+3
* net: gem: Do not continue if phy is not foundMichal Simek2015-12-07-4/+10
* net: zynq: Fix MDC setting for zynqMichal Simek2015-11-19-1/+1
* net: zynq: Remove unused MDCCLKDIV2 macroMichal Simek2015-11-19-1/+0
* net: zynq: Fix mdc clock division setting for 100Mbit/sMichal Simek2015-11-19-2/+2
* net: zynq: Wait till packet is sentMichal Simek2015-11-19-1/+32
* net: zynq: Disable secondary queuesEdgar E. Iglesias2015-11-19-0/+26
* net: zynq: Add dummy packet to fix packet duplication issueMichal Simek2015-11-19-2/+8
* net: zynq: Do not report TX underrunMichal Simek2015-11-19-2/+0
* net: zynq: Setup BD when structures are filledMichal Simek2015-11-19-3/+3
* net: zynq: Allocate BD_SPACE in connection to RX_BUFMichal Simek2015-11-19-1/+1
* net: zynq: Fix clearing statisticMichal Simek2015-11-19-4/+3
* net: zynq: Extend register description with offsetsMichal Simek2015-11-19-15/+15
* net: zynq: Add support for different PHY interface typesMichal Simek2015-11-19-1/+8
* net: zynq: Add debug message to phyread/phywriteMichal Simek2015-11-19-1/+12
* driver: net: Fix pointer conversion warnings for xilinx_zynqmp_epPrabhakar Kushwaha2015-11-12-8/+8
* of: clean up OF_CONTROL ifdef conditionalsMasahiro Yamada2015-08-18-1/+1
* net: gem: Extend timeout valueMichal Simek2015-07-28-1/+1
* zynq: gem: Setting up WRAP bit for one TX bdMichal Simek2015-07-28-1/+2
* zynq: gem: Increase the Rx buffer descriptors to 32Siva Durga Prasad Paladugu2015-07-28-1/+1
* zynqmp: gem: Flush the rx buffers while transmittingSiva Durga Prasad Paladugu2015-07-28-3/+7
* zynqmp: gem: Set data bus width to 64bit for arm64Siva Durga Prasad Paladugu2015-07-28-1/+8
* net: gem: Use correct type for castingMichal Simek2015-04-20-1/+2
* net: cosmetic: Fix var naming net <-> eth driversJoe Hershberger2015-04-18-1/+1
* net: gem: Use phys_addr_t instead of int for addressesMichal Simek2015-01-21-2/+3
* net: zynq: Fix sparse warnings in gemMichal Simek2014-05-06-0/+1
* net: zynq: Use predefined macros instead of hardcoded valueMichal Simek2014-05-06-1/+2
* net: gem: Add OF initialization supportMichal Simek2014-03-04-0/+42
* net: zynq_gem: Calculate clock dividers dynamicallySoren Brinkmann2014-02-19-6/+11
* net: zynq_gem: Move RCLK details out of driverSoren Brinkmann2014-02-19-5/+2
* net: gem: Check if phy was correctly detectedMichal Simek2014-01-21-0/+5
* net: zynq_gem: Add d-cache supportSrikanth Thokala2013-11-22-29/+53
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-14-1/+1
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
generated by cgit v1.1 at 2024-11-05 12:16:50 +0000