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* MLK-14484-1 mtd/spi: Add MT35XU512ABA NOR flash supportYe Li2017-04-05-0/+4
| | | | | | | | | | | | Add MT35XU512ABA parameters to NOR flash parameters array. Since the manufactory ID is changed to 0x2C, add it for micron and using it for relevant settings. The MT35XU512ABA only supports 1 bit mode and 8 bits. It can't support dual and quad. Because the 8 bits is not support by u-boot framework and driver. We only use 1 bit mode for this flash. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-13450-17 sf: Add Macronix MX25R6435F SPI NOR flash to flash parameters arrayYe Li2017-04-05-0/+1
| | | | | | | On mx7ulp EVK board, we use MX25R6435F NOR flash, add its parameters and IDs to flash parameter array. Otherwise, the flash probe will fails. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12483-4 mx6: Modify drivers to disable fused modulesYe Li2017-04-05-0/+7
| | | | | | | | | | | Add the fuse checking in drivers, when the module is disabled in fuse, the driver will not work. Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C, USB-EHCI, GIS, LCDIF. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 1704e116f9b39aeb99201919a18bc2b1e19a980e)
* MLK-12865 Nand: Fix BCH debug1 register access issueYe Li2017-04-05-1/+1
| | | | | | | Should have "&" to access the register address, otherwise uboot will hang. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 0b65071afaae9d6a49fb7dda2902f5c8bcd678c2)
* MLK-12693-2 nand: mxs: correct bitflip for erased NAND pagePeng Fan2017-04-05-1/+18
| | | | | | | | | | | | | | | | | | | | This patch is a porting of http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_4.1.15_1.0.0_ga&id=e4dacc44d22e9474ec456cb330df525cd805ea38 " i.MX6QP and i.MX7D BCH module integrated a new feature to detect the bitflip number for erased NAND page. So for these two platform, set the erase threshold to gf/2 and if bitflip detected, GPMI driver will correct the data to all 0xFF. Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q with the one for i.MX6QP. " In this patch, i.MX6UL is added and threshold changed to use ecc_strength. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 489929be0221bb7d4c46bb5bc6083650b78f73e0) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12693-1 nand: mxs: fix the bitflips for erased page when uncorrectable errorPeng Fan2017-04-05-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is porting from linux: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_4.1.15_1.0.0_ga&id=3d42fcece496224fde59f9343763fb2dfc5b0768 " We may meet the bitflips in reading an erased page(contains all 0xFF), this may causes the UBIFS corrupt, please see the log from Elie: ----------------------------------------------------------------- [ 3.831323] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.845026] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.858710] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.872408] UBI error: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read 16384 bytes ... [ 4.011529] UBIFS error (pid 36): ubifs_recover_leb: corrupt empty space LEB 27:237568, corruption starts at 9815 [ 4.021897] UBIFS error (pid 36): ubifs_scanned_corruption: corruption at LEB 27:247383 [ 4.030000] UBIFS error (pid 36): ubifs_scanned_corruption: first 6569 bytes from LEB 27:247383 ----------------------------------------------------------------- This patch does a check for the uncorrectable failure in the following steps: [0] set the threshold. The threshold is set based on the truth: "A single 0 bit will lead to gf_len(13 or 14) bits 0 after the BCH do the ECC." For the sake of safe, we will set the threshold with half the gf_len, and do not make it bigger the ECC strength. [1] count the bitflips of the current ECC chunk, assume it is N. [2] if the (N <= threshold) is true, we continue to read out the page with ECC disabled. and we count the bitflips again, assume it is N2. (We read out the whole page, not just a chunk, this makes the check more strictly, and make the code more simple.) [3] if the (N2 <= threshold) is true again, we can regard this is a erased page. This is because a real erased page is full of 0xFF(maybe also has several bitflips), while a page contains the 0xFF data will definitely has many bitflips in the ECC parity areas. [4] if the [3] fails, we can regard this is a page filled with the '0xFF' data. " Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit ceb324a2914487aa517a6c70a06a20b5e3438fda)
* MLK-12603: mtd: gpmi: may use legacy bch geometry in u-bootHan Xu2017-04-05-0/+13
| | | | | | | | | | | | provide one config "CONFIG_NAND_MXS_BCH_LEGACY_GEO" to keep using legacy bch geometry. NOTICE: the feature must be enabled/disabled in both u-boot and kernel. Signed-off-by: Han Xu <han.xu@nxp.com> (cherry picked from commit 0abc9c182c24f88522bd74fa1b53cd2fa3477184) (cherry picked from commit 772af34b1216acc8e6a1a3faf43fef7c90b26a2f) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-11718-2: mtd: nand: change the BCH layout setting for large oob NANDHan Xu2017-04-05-38/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | The cod change updated the NAND driver BCH ECC layout algorithm to support large oob size NAND chips(oob > 1024 bytes). Current implementation requires each chunk size larger than oob size so the bad block marker (BBM) can be guaranteed located in data chunk. The ECC layout always using the unbalanced layout(Ecc for both meta and Data0 chunk), but for the NAND chips with oob larger than 1k, the driver cannot support because BCH doesn’t support GF 15 for 2K chunk. The change keeps the data chunk no larger than 1k and adjust the ECC strength or ECC layout to locate the BBM in data chunk. General idea for large oob NAND chips is 1.Try all ECC strength from the minimum value required by NAND spec to the maximum one that works, any ECC makes the BBM locate in data chunk can be chosen. 2.If none of them works, using separate ECC for meta, which will add one extra ecc with the same ECC strength as other data chunks. This extra ECC can guarantee BBM located in data chunk, of course, we need to check if oob can afford it. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit 78f620a6d6ab44bd34e42f00abe4673db099ca73)
* mtd: nand: build MXS driver for MX7 as wellAndrey Yurovsky2017-02-19-1/+1
| | | | | | | | | | | The i.MX7 has the same GPMI controller as i.MX6 and is covered by the MXS driver. Tell Kconfig that we can use this driver on the MX7 platform (the MXS driver already has the few i.MX7-specific changes needed for basic operation and the board itself sets the pinmux correctly). Tested on i.MX7D with the Sabre board and a NAND Flash soldered to U12. Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
* flash: complete CONFIG_SYS_NO_FLASH move with renamingMasahiro Yamada2017-02-12-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is not completed. Finish this work by the tool. During this move, let's rename it to CONFIG_MTD_NOR_FLASH. Actually, we have more instances of "#ifndef CONFIG_SYS_NO_FLASH" than those of "#ifdef CONFIG_SYS_NO_FLASH". Flipping the logic will make the code more readable. Besides, negative meaning symbols do not fit in obj-$(CONFIG_...) style Makefiles. This commit was created as follows: [1] Edit "default n" to "default y" in the config entry in common/Kconfig. [2] Run "tools/moveconfig.py -y -r HEAD SYS_NO_FLASH" [3] Rename the instances in defconfigs by the following: find . -path './configs/*_defconfig' | xargs sed -i \ -e '/CONFIG_SYS_NO_FLASH=y/d' \ -e 's/# CONFIG_SYS_NO_FLASH is not set/CONFIG_MTD_NOR_FLASH=y/' [4] Change the conditionals by the following: find . -name '*.[ch]' | xargs sed -i \ -e 's/ifndef CONFIG_SYS_NO_FLASH/ifdef CONFIG_MTD_NOR_FLASH/' \ -e 's/ifdef CONFIG_SYS_NO_FLASH/ifndef CONFIG_MTD_NOR_FLASH/' \ -e 's/!defined(CONFIG_SYS_NO_FLASH)/defined(CONFIG_MTD_NOR_FLASH)/' \ -e 's/defined(CONFIG_SYS_NO_FLASH)/!defined(CONFIG_MTD_NOR_FLASH)/' [5] Modify the following manually - Rename the rest of instances - Remove the description from README - Create the new Kconfig entry in drivers/mtd/Kconfig - Remove the old Kconfig entry from common/Kconfig - Remove the garbage comments from include/configs/*.h Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* dm: core: Replace of_offset with accessorSimon Glass2017-02-08-6/+6
| | | | | | | | | At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
* omap-gpmc: use SECTOR_BYTES instead of hardcoded valueLadislav Michl2017-01-14-4/+4
| | | | | | | Replace hardcoded value with defined constant SECTOR_BYTES. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2017-01-10-1/+1
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| * spl: sunxi: Fix build error with CONFIG_SPL_SPI_SUNXIPriit Laes2017-01-04-1/+1
| | | | | | | | | | | | | | Fix typo introduced in ebc4ef61d76fc182773fe225151adc9b913c62eb Signed-off-by: Priit Laes <plaes@plaes.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | mtd: nand: mxs_nand_spl: Fix to remove twise 'NAND' printJagan Teki2017-01-04-1/+1
|/ | | | | | | | | | | | | | | | | | SPL from nand will print 'NAND' in boot_from_devices based on the image_loader name, remove the extra 'NAND ' in mxs_nand_spl driver. Original behaviour: ------------------- U-Boot SPL 2017.01-rc2-gf84dd8b (Jan 02 2017 - 22:24:19) Trying to boot from NANDNAND : 512 MiB After the fix: ------------- U-Boot SPL 2017.01-rc2-gf84dd8b-dirty (Jan 02 2017 - 23:17:00) Trying to boot from NAND: 512 MiB Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
* Revert "sf: Fix quad bit set for micron devices"Cyrille Pitchen2016-12-15-63/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit c56ae7519f141523ba1248b22b5b5169b21772fe. Once the 'Quad Enable' bit is cleared in their Enhanced Volatile Configuration Register (EVCR), Micron memories expect ALL commands to use the SPI 4-4-4 protocol. Commands using SPI 1-y-z protocols are no longer accepted. Within the reverted commit, the write_evcr() function is implemented using the spi_flash_write_common(), which is a shortcut for the [ spi_flash_cmd_write_enable(), spi_flash_cmd_write(), spi_flash_cmd_wait_ready() ] sequence. Since the internal state of the Micron memory has been changed when the spi_flash_cmd_write() function completes, the later call of the spi_flash_cmd_wait_ready() function fails. Indeed the SPI controller driver is not aware of the SPI protocol switch. Further patches will fix the support of Micron QSPI memories. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> [Rebase on master, use JEDEC_MFR(info) in place of idcode0] Signed-off-by: Jagan Teki <jagan@openedev.com>
* sf: Do not force the DT memory map size to exactly match the devicePhil Edworthy2016-12-15-1/+1
| | | | | | | | | As long as the memory mapped size specifeid in the DT is the same or bigger than the device size, it will work. So do not force the sizes to be identical. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* mtd: spi: don't return -1 when scan succeedFabien Parent2016-12-15-2/+2
| | | | | | | | | | In spi_flash_scan, 'ret' is initialled to -1, but 'ret' is not always used to store a return value, in that case, even when the function succeed, an error (-1) will be returned. Lets just return 0 if we hit the end of the function. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* spl: Add a name to the SPL load-image methodsSimon Glass2016-12-09-1/+1
| | | | | | | | | | | It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org>
* mtd: cfi_flash: fix indentationAndre Przywara2016-12-04-2/+2
| | | | | | | | | | | | The indentation is misleading here and suggests that the write command will be only executed in the else clause. It seems like this is not intended, so fix the indentation to avoid both compiler warnings and puzzled readers. Pointed out by GCC 6.2's -Wmisleading-indentation warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stefan Roese <sr@denx.de>
* NAND: davinci: add support for NAND chips with 16 bits busFabien Parent2016-12-03-0/+3
| | | | | | | | The OMAPL138-LCD board uses a NAND chip with a 16 bits bus. Add support into the davinci driver for 16 bit bus NAND chips. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* mtd: nand: add support for the TC58NVG2S0H chipBoris Brezillon2016-11-28-0/+3
| | | | | | | | | | Add the description of the Toshiba TC58NVG2S0H SLC nand to the nand_ids table so we can use the NAND ECC infos and the ONFI timings. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* spi: Add of-platdata support to SPI and SPI flashSimon Glass2016-11-25-1/+1
| | | | | | | Some boards may want to use these subsystems with of-platdata in SPL. Add support for this by avoiding any device tree access in this case. Signed-off-by: Simon Glass <sjg@chromium.org>
* sf: Add support for MX66U51235F, MX66L1G45G, MT25QU02G, MT25QL02GRadu Bacrau2016-11-22-0/+4
| | | | | | | | | | | This commit adds support for the Macronix MX66U51235F, MX66L1G45G and Micron MT25QU02G, MT25QL02G flash parts. Signed-off-by: Radu Bacrau <dumitru.bacrau@intel.com> Cc: Chin Liang See <clsee@altera.com> Cc: Radu Bacrau <radu.bacrau@gmail.com> [Update proper commit header and 80-line cut on body] Reviewed-by: Jagan Teki <jagan@openedev.com>
* drivers: SPI: sunxi SPL: fix warningAndre Przywara2016-11-21-1/+2
| | | | | | | | | Somehow an int returning function without a return statement sneaked in, fix it. Also fix some whitespace damage on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sf: Fix s25fs512s id tableJagan Teki2016-11-19-1/+1
| | | | | | | | | s25fs512s and s25fl512s_256k have common id information till 5 bytes and 6th byte have different family id like FS and FL-S as 0x81 and 0x80. Reported-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
* sf: dataflash: Minor cleanupsJagan Teki2016-11-19-23/+15
| | | | | | | | | | | | | | | - fix single line comments - remove unneeded spaces - ascending order of include files - rename SPI DATAFLASH to dataflash - rename SPI DataFlash to dataflash - return NULL replaced with error code Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sf: dataflash: Fix add_dataflash return logicJagan Teki2016-11-19-66/+61
| | | | | | | | | | | | This patch fixed the add_dataflash return logic, so-that it can handle both jedec and older chips same as Linux. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sf: dataflash: Move flash id detection into jedec_probeJagan Teki2016-11-19-9/+10
| | | | | | | | | | | | | | Flash id detection should be the first step to enumerate the connected flash on the board, once ie done checking with respective id codes locally in the driver all this should be part of jedec_probe instead of id detection and validated through flash_info{} table separatly. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sf: dataflash: Remove unneeded spi dataJagan Teki2016-11-19-5/+1
| | | | | | | | | | | dataflash doesn't require options, memory_map from spi. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
* spi: Remove dual flash options/flagsJagan Teki2016-11-19-9/+3
| | | | | | | | | | | | | | | | | | | | | Dual flash code in spi are usually take the spi controller to work with dual connected flash devices. Usually these dual connection operation's are referred to flash controller protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers. So, this patch remove the dual_flash options or flags in sf which are triggered from spi controller side. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sf: Rename few local functionsJagan Teki2016-11-18-13/+12
| | | | | | | | | | | | | | | | spi_flash_write_bar-> write_bar spi_flash_write_bar -> read_bar spi_flash_cmd_wait_ready -> spi_flash_wait_till_ready Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sf: ids: Use small letter in ext_jedecJagan Teki2016-11-18-1/+1
| | | | | | | | | | | | | | Use small 'd' in s25s512s ext_jedec Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
* sf: ids: Use small letter's with flash nameJagan Teki2016-11-18-110/+110
| | | | | | | | | | | | | | | For readability use small letter's with flash name. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
* sf: Rename sf_params.c to spi_flash_ids.cJagan Teki2016-11-18-2/+3
| | | | | | | | | | | | | | | Now the flash params table as renamed to spi_flash_ids structure, so rename the sf_params.c to spi_flash_ids.c and remove the legacy. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
* sf: Remove non-meaningful commentsJagan Teki2016-11-18-4/+0
| | | | | | | | | | | | | | | Remove unneeded/non-meaningful commit message on params and flash. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
* sf: Remove spansion_s25fss_disable_4KB_eraseJagan Teki2016-11-18-86/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB. To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately. So better to erase the whole flash using 4K sector erase instead of detecting these family parts again and do two different erase operations. For this: - Removed spansion_s25fss_disable_4KB_erase code - Add SECT_4K for S25FS512S chip Cc: Yunhui Cui <yunhui.cui@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
* sf: params: Add S25FS256S_64K spi flash supportJagan Teki2016-11-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Spansion S25FS256S_64K spi flash to the list of spi_flash_ids. In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB. To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately. So better to erase the whole flash using 4K sector erase instead of detecting these family parts again and do two different erase operations. Cc: Yunhui Cui <yunhui.cui@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sf: Add INFO6 flash_info macroJagan Teki2016-11-18-0/+15
| | | | | | | | | | | | | | | INFO6 is for tabulating 6 byte flash parts, Ex: S25FS256S_64K Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
* sf: Increase max id length by 1 byteJagan Teki2016-11-18-1/+1
| | | | | | | | | | | | | | | | So, now SPI_FLASH_ID_MAX_LEN is 6 bytes useful for few spansion flash families S25FS-S Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
* sf: Add SPI_FLASH_MAX_ID_LENJagan Teki2016-11-18-3/+4
| | | | | | | | | | | | | | | Add id length of 5 bytes numerical value to macro. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
* sf: nr_sectors -> n_sectorsJagan Teki2016-11-18-4/+4
| | | | | | | | | | | | | | | Rename nr_sectors as n_sectors to sync with Linux. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
* sf: Cleanup spi_flash_info{}Jagan Teki2016-11-18-24/+20
| | | | | | | | | | | | | | | | | - Proper tabs spaces - Removed unnecessary - Add comments in spi_flash_info members - Add comments for spi_flash_info.flags Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sf: sandbox: Use JEDEC_MFR|ID in id exctractJagan Teki2016-11-18-3/+2
| | | | | | | | | | | Instead of extracting id's separately better to use JEDEC_MFR|ID for code simplicity. Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
* sf: Simplify lock ops detection codeJagan Teki2016-11-18-8/+4
| | | | | | | | | | | | | | | | Simplify the flash_lock ops detection code and added meaningful comment. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
* sf: Adopt flash table INFO macro from LinuxJagan Teki2016-11-18-180/+209
| | | | | | | | | | | | | | | | | | | | | | | | INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes. - Add JEDEC_ID - Add JEDEC_EXT macro - Add JEDEC_MFR - spi_flash_params => spi_flash_info - params => info Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
* nand: arasan_nfc: Clear ecc on bit while sending read commandSiva Durga Prasad Paladugu2016-11-15-0/+2
| | | | | | | | | | Clear ecc ON bit while sending read command as all types of read command(like reading spare) doesnt need ECC to be enabled. It has been anyway taken care in other places whereever required using arasan_nand_enable_ecc(). Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mtd: nand: zynq_nand: Add nand driver support for zynqSiva Durga Prasad Paladugu2016-11-15-0/+1194
| | | | | | | Add nand flash controller driver support for zynq SoC. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mtd: nand: Kconfig: Add NAND_MXS entryJagan Teki2016-10-26-0/+7
| | | | | | | | | | | | | Added kconfig for NAND_MXS driver. Cc: Scott Wood <oss@buserror.net> Cc: Simon Glass <sjg@chromium.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* spl: Update ext functions to take an spl_image parameterSimon Glass2016-10-06-4/+5
| | | | | | | Update the ext loader to avoid using the spl_image global variable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.1 at 2024-12-25 20:32:36 +0000