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| author | Ye Li <ye.li@nxp.com> | 2017-03-17 17:37:41 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2017-04-05 17:24:36 +0800 |
| commit | 7595df64537e674df0a841563424b30b289d49fc (patch) | |
| tree | 99ca5fcfca76b825bba77d3708966b7a1ff04a78 /drivers/mtd | |
| parent | 2e79a95aad75eeb7d225caa77cc31deaaf8d4a29 (diff) | |
| download | u-boot-imx-7595df64537e674df0a841563424b30b289d49fc.zip u-boot-imx-7595df64537e674df0a841563424b30b289d49fc.tar.gz u-boot-imx-7595df64537e674df0a841563424b30b289d49fc.tar.bz2 | |
MLK-14484-1 mtd/spi: Add MT35XU512ABA NOR flash support
Add MT35XU512ABA parameters to NOR flash parameters array. Since the
manufactory ID is changed to 0x2C, add it for micron and using it for
relevant settings.
The MT35XU512ABA only supports 1 bit mode and 8 bits. It can't support
dual and quad. Because the 8 bits is not support by u-boot framework and
driver. We only use 1 bit mode for this flash.
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/spi/sf_internal.h | 1 | ||||
| -rw-r--r-- | drivers/mtd/spi/spi_flash.c | 2 | ||||
| -rw-r--r-- | drivers/mtd/spi/spi_flash_ids.c | 1 |
3 files changed, 4 insertions, 0 deletions
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 839cdbe..f46cb3a 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -33,6 +33,7 @@ enum spi_nor_option_flags { /* CFI Manufacture ID's */ #define SPI_FLASH_CFI_MFR_SPANSION 0x01 #define SPI_FLASH_CFI_MFR_STMICRO 0x20 +#define SPI_FLASH_CFI_MFR_MICRON 0x2C #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2 #define SPI_FLASH_CFI_MFR_SST 0xbf #define SPI_FLASH_CFI_MFR_WINBOND 0xef diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index ab7910b..1dbf4d2 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -903,6 +903,7 @@ static int set_quad_mode(struct spi_flash *flash, #endif #ifdef CONFIG_SPI_FLASH_STMICRO case SPI_FLASH_CFI_MFR_STMICRO: + case SPI_FLASH_CFI_MFR_MICRON: debug("SF: QEB is volatile for %02x flash\n", JEDEC_MFR(info)); return 0; #endif @@ -977,6 +978,7 @@ int spi_flash_scan(struct spi_flash *flash) #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) /* NOR protection support for STmicro/Micron chips and similar */ if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_STMICRO || + JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MICRON || JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) { flash->flash_lock = stm_lock; flash->flash_unlock = stm_unlock; diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index e76fded..48d3768 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -134,6 +134,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"n25q1024a", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, {"mt25qu02g", INFO(0x20bb22, 0x0, 64 * 1024, 4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, {"mt25ql02g", INFO(0x20ba22, 0x0, 64 * 1024, 4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"mt35xu512aba", INFO(0x2c5b1a, 0x0, 128 * 1024, 512, E_FSR | SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */ {"sst25vf040b", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, |