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* sunxi: gpio: Add .xlate function for gpio phandle resolutionChen-Yu Tsai2016-07-31-0/+16
| | | | | | | | | | | | | sunxi uses a 2 cell phandle for gpio bindings. Also there are no seperate nodes for each pin bank. Add a custom .xlate function to map gpio phandles to the correct pin bank device. This fixes gpio_request_by_name usage. Fixes: 7aa974858422 ("dm: sunxi: Modify the GPIO driver to support driver model") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* ARM: uniphier: use (devm_)ioremap() instead of map_sysmem()Masahiro Yamada2016-07-24-13/+3
| | | | | | | | This does not have much impact on behavior, but makes code look more more like Linux. The use of devm_ioremap() often helps to delete .remove callbacks entirely. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* dm: gpio: MPC85XX GPIO platform data supportHamish Martin2016-07-11-7/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define a platform data structure for the MPC85XX GPIO driver to allow use of the driver without device tree. Users should define the GPIO blocks for their platform like this: struct mpc85xx_gpio_plat gpio_blocks[] = { { .addr = 0x130000, .ngpios = 32, }, { .addr = 0x131000, .ngpios = 32, }, }; U_BOOT_DEVICES(my_platform_gpios) = { { "gpio_mpc85xx", &gpio_blocks[0] }, { "gpio_mpc85xx", &gpio_blocks[1] }, }; This is intended to build upon the recent submission of the base MPC85XX driver from Mario Six. We need to use that new driver without dts support and this patch gives us that flexibility. This has been tested on a Freescale T2080 CPU, although only the first GPIO block. Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz> Reviewed-by: Mario Six <mario.six@gdsys.cc> Tested-by: Mario Six <mario.six@gdsys.cc> Acked-by: Simon Glass <sjg@chromium.org>
* gpio: pca953x: Fix register reading past 8th GPIOmario.six@gdsys.cc2016-06-19-1/+3
| | | | | | | | | | | | A bug in the pca953x driver prevents correct reading of GPIO input values beyond the 8th GPIO; all values are reported as zero. Setting of GPIO output values is not affected. This patch fixes the reading behavior. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Peng Fan <van.freenix@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-06-13-3/+8
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| * gpio: at91: Fix pullup/pulldown configuration on PIO3Marek Vasut2016-06-12-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On systems with PIO3 (SAMA5D3/D4/..), the pullup and pulldown configuration is mutualy exclusive. This patch assures that the opposite pull resistor gets disabled before the requested pull resistor is enabled. This changes behavior of at91_set_pio_pulldown() such that the pullup is only disabled if pulldown is to be enabled. This changes behavior of at91_set_pio_pullup() such that the pulldown is only disabled if pullup is to be enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
* | x86: broadwell: gpio: Remove the codes to set up pin controlBin Meng2016-06-12-7/+0
| | | | | | | | | | | | | | | | | | Now that we have set up pin control in cpu_init_r(), remove the duplicated codes in the broadwell gpio driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | x86: Probe pinctrl driver in cpu_init_r()Bin Meng2016-06-12-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present pinctrl driver gets probed in ich6_gpio driver's probe routine, which has two issues: - Pin's PADs only gets configured when GPIO driver is probed, which is not done by default. This leaves the board in a partially functional state as we must initialize PADs correctly to get perepherals fully working. - The probe routine of pinctrl driver is called multiple times, as normally there are multiple GPIO controllers. It should really be called just once. Move the call to syscon_get_by_driver_data() from ich6_gpio driver to cpu_init_r(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: George McCollister <george.mccollister@gmail.com> Tested-by: George McCollister <george.mccollister@gmail.com>
* | x86: ich6_gpio: Output return value of syscon_get_by_driver_data()Bin Meng2016-06-12-1/+3
|/ | | | | | | | | The call to syscon_get_by_driver_data() does not save its return value. Print it out to aid debugging. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-06-04-0/+322
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| * dm: test: Add GPIO open drain testsmario.six@gdsys.cc2016-06-03-0/+35
| | | | | | | | | | | | | | | | | | | | Add some tests for the new open drain setting feature of the GPIO uclass, and extend the capabilities of the sandbox GPIO driver accordingly. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * dm: gpio: Implement open drain for MPC85XX GPIOmario.six@gdsys.cc2016-06-03-3/+44
| | | | | | | | | | | | | | | | | | This patch implements the open-drain setting feature for the MPC85XX GPIO controller. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * dm: gpio: Add methods for open drain settingmario.six@gdsys.cc2016-06-03-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Certain GPIO devices have the capability to switch their GPIOs into open-drain mode, that is, instead of actively driving the output (Push-pull output), the pin is connected to the collector (for a NPN transistor) or the drain (for a MOSFET) of a transistor, respectively. The pin then either forms an open circuit or a connection to ground, depending on the state of the transistor. This patch adds functions to the GPIO uclass to switch GPIOs to open-drain mode on devices that support it. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * dm: gpio: Add driver for MPC85XX GPIO controllermario.six@gdsys.cc2016-06-03-0/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for the built-in GPIO controller of the MPC85XX SoC (probably supporting other PowerQUICC III SoCs as well). Each GPIO bank is identified by its own entry in the device tree, i.e. gpio-controller@fc00 { #gpio-cells = <2>; compatible = "fsl,pq3-gpio"; reg = <0xfc00 0x100> } By default, each bank is assumed to have 32 GPIOs, but the ngpios setting is honored, so the number of GPIOs for each bank in configurable to match the actual GPIO count of the SoC (e.g. the 32/32/23 banks of the P1022 SoC). The usual functions of GPIO drivers (setting input/output mode and output value setting) are supported. The driver has been tested on MPC85XX, but it is likely that other PowerQUICC III devices will work as well. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-06-03-1/+365
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| * | gpio: add Tegra186 GPIO driverStephen Warren2016-05-31-1/+358
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra186's GPIO controller register layout is significantly different from previous chips, so add a new driver for it. In fact, there are two different GPIO controllers in Tegra186 that share a similar register layout, but very different port mapping. This driver covers both. The DT binding is already present in the Linux kernel (in linux-next via the Tegra tree so far). Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> # v1 Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: convert CONFIG_TEGRA_GPIO to KconfigStephen Warren2016-05-31-0/+7
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Future chips will contain different GPIO HW. This change will enable future SoC support to select the appropriate GPIO driver for their HW, in a future-looking fashion, using Kconfig. TEGRA_GPIO is not simply selected by TEGRA_COMMON (even though all current Tegra chips used this GPIO HW) to simplify the later addition of support for Tegra SoCs that use different GPIO HW. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | gpio: mxs: Remove netdev.hMarek Vasut2016-06-02-1/+0
|/ | | | | | | | | | The MXS certainly does not support any sort of networking in GPIO code, remove the netdev.h header. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-05-27-40/+50
|\ | | | | | | | | | | | | | | | | | | | | | | | | For odroid-c2 (arch-meson) for now disable designware eth as meson now needs to do some harder GPIO work. Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: lib/efi_loader/efi_disk.c Modified: configs/odroid-c2_defconfig
| * sunxi: gpio: convert bind() to use driver dataStephen Warren2016-05-26-40/+50
| | | | | | | | | | | | | | | | | | | | | | Now that the DM core sets driver_data before calling bind(), this driver can make use of driver_data to determine the set of child devices to create, rather than manually re-implementing the matching logic in code. Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
* | dm: gpio: pca953x: Support PCA953X with 40 GPIOsmario.six@gdsys.cc2016-05-27-3/+6
|/ | | | | | | | | | | A DM driver for PCA953x was recently introduced by Peng Fan, which lacked support for the 40 GPIO versions. This patch adds support for these chips. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* gpio: zynq: Add support for reading gpio pin stateMichal Simek2016-05-24-0/+22
| | | | | | | Add zynq_gpio_get_function() which return status on gpio pin. This function enables gpio status command. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* gpio: exynos(s5p): remove gpio_xlate routineEric Nelson2016-05-17-11/+0
| | | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the Exynos/S5P gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* gpio: rk: remove gpio_xlate routineEric Nelson2016-05-17-11/+0
| | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the Rockchip gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org>
* gpio: pic32: remove gpio_xlate routineEric Nelson2016-05-17-10/+0
| | | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the pic32 gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Purna Chandra Mandal <purna.mandal@microchip.com>
* gpio: omap: remove gpio_xlate routineEric Nelson2016-05-17-11/+0
| | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the omap gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org>
* gpio: intel_broadwell: remove gpio_xlate routineEric Nelson2016-05-17-10/+0
| | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the intel_broadwell driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: gpio: add a default gpio xlate routineEric Nelson2016-05-17-7/+23
| | | | | | | | | | | | | | | | | Many drivers use a common form of offset + flags for device tree nodes. e.g.: <&gpio1 2 GPIO_ACTIVE_LOW> This patch adds a common implementation of this type of parsing and calls it when a gpio driver doesn't supply its' own xlate routine. This will allow removal of the driver-specific versions in a handful of drivers and simplify the addition of new drivers. Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: gpio: introduce 74x164 driverPeng Fan2016-05-17-0/+202
| | | | | | | | | | | | | | | | | | | | Introduce driver to support "fairchild,74hc595" devices. 1. Take linux drivers/drivers/gpio/gpio-74x164.c as reference. 2. Following the naming used in Linux driver with gen_7x164 as the prefix. 3. Enable CONFIG_DM_74X164 to use this driver. 4. Follow Documentation/devicetree/bindings/gpio/gpio-74x164.txt to add device nodes 5. Tested on i.MX6 UltraLite with 74LV595 using gpio command and oscillograph. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Chin Liang See <clsee@altera.com> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: gpio: pca953x: introduce driver model support for pca953xPeng Fan2016-05-17-0/+375
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a new driver that supports driver model for pca953x. The pca953x chips are used as I2C I/O expanders. This driver is designed to support the following chips: " 4 bits: pca9536, pca9537 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554, pca9556, pca9557, pca9574, tca6408, xra1202 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575, tca6416 24 bits: tca6424 40 bits: pca9505, pca9698 " But for now this driver only supports max 24 bits and pca953x compatible chips. pca957x compatible chips are not supported now. These can be addressed when we need to add such support for the different chips. This driver has been tested on i.MX6 SoloX Sabreauto board with max7310 i2c expander using gpio command as following: =>gpio status -a Bank gpio@30_: gpio@30_0: input: 1 [ ] => dm tree: i2c [ ] | | `-- i2c@021a8000 gpio [ ] | | |-- gpio@30 gpio [ ] | | `-- gpio@32 Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Wenyou Yang <wenyou.yang@atmel.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Purna Chandra Mandal <purna.mandal@microchip.com> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: Andrea Scian <andrea.scian@dave.eu> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Michal Simek <michal.simek@xilinx.com> #on ZynqMP zcu102
* drivers/gpio/pm8916_gpio.c: Make pid be uint32_tTom Rini2016-04-18-1/+1
| | | | | | | | | If get_dev_addr fails it will return FDT_ADDR_T_NONE and: >>> "priv->pid == 4294967295U" is always false regardless of the values of its operands. This occurs as the logical operand of if. Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reported-by: Coverity (CID: 143913) Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-04-13-96/+253
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| * GPIO: pca953x: Remove compilation warnings on arm64Michal Simek2016-04-13-2/+2
| | | | | | | | | | | | | | | | | | | | | | Warnings: w+../drivers/gpio/pca953x.c: In function ‘do_pca953x’: w+../drivers/gpio/pca953x.c:220:5: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] w+../drivers/gpio/pca953x.c:233:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Kconfig: Enable ZYNQ_GPIO for ZynqMPSiva Durga Prasad Paladugu2016-04-13-1/+1
| | | | | | | | | | | | | | | | Enable ZYNQ_GPIO for ZynqMP using Kconfig. It enables the GPIO driver support for ZynqMP. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: zynqmp: Add GPIO driver support for ZynqMPSiva Durga Prasad Paladugu2016-04-13-53/+147
| | | | | | | | | | | | | | Add GPIO driver support for ZynqMP platform Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: zynq: Move the definitions to driver fileSiva Durga Prasad Paladugu2016-04-13-0/+61
| | | | | | | | | | | | | | | | Move all the gpio definitions to driver file as there is no use of them in other files. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: zynq: Remove non driver model codeSiva Durga Prasad Paladugu2016-04-13-157/+1
| | | | | | | | | | | | | | | | | | Remove non driver model support as it moved to driver model. Dont need non driver model anymore. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: Kconfig: Enable Zynq GPIO driver using kconfigSiva Durga Prasad Paladugu2016-04-13-0/+7
| | | | | | | | | | | | | | | | Enable DM GPIO and ZYNQ GPIO using kconfig instead of the board config file. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: zynq: Convert Zynq GPIO to driver modelSiva Durga Prasad Paladugu2016-04-13-0/+151
| | | | | | | | | | | | | | Convert Zynq GPIO driver to driver model Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | gpio: mvebu_gpio: Add missing out value set to gpio_direction_output()Stefan Roese2016-04-12-0/+4
|/ | | | | | | | | | | This patch adds the missing configuration of the output value to the gpio_direction_output() function. Without this, calling gpio_direction_output() does not set the out-value at all and only configures the gpio as output. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Reviewed-by: Kevin Smith <kevin.smith@elecsyscorp.com>
* gpio: Add support for Qualcomm PM8916 gpiosMateusz Kulikowski2016-04-01-0/+313
| | | | | | | | | | | This driver supports GPIOs present on PM8916 PMIC. There are 2 device drivers inside: - GPIO driver (4 "generic" GPIOs) - Keypad driver that presents itself as GPIO with 2 inputs (power and reset) Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* gpio: Add support for Qualcomm gpio controllerMateusz Kulikowski2016-04-01-0/+148
| | | | | | | | | | Add support for gpio controllers on Qualcomm Snapdragon devices. This devices are usually called Top Level Mode Multiplexing in Qualcomm documentation. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-04-01-11/+14
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| * sunxi: axp: Generalize register macros for VBUS drive GPIOChen-Yu Tsai2016-03-31-11/+14
| | | | | | | | | | | | | | | | | | VBUS drive is supported on AXP221 and later PMICs. Rework the macros so we can support this on later PMICs without too much work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | gpio: uniphier: use devm_get_addr() to get base addressMasahiro Yamada2016-04-01-5/+3
|/ | | | | | | | | Currently, fdtdec_get_addr_size() does not support the address translation, so it cannot handle device trees with non-straight "ranges" properties. (This would be a problem with DTS for UniPhier ARMv8 SoCs.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-03-25-0/+127
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| * gpio: Add DM GPIO driver for Marvell MVEBUStefan Roese2016-03-24-0/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a DM GPIO driver for the Marvell MVEBU SoCs. There are other non-DM drivers that might be used on these platforms. But this patch creates a new DM driver. Which will be used by all Armada XP/38x boards. Other MVEBU SoC (Kirkwood / Orion) may follow once they support DM as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | sunxi: Add a bunch of missing compatible strings to sunxi_gpio.cHans de Goede2016-03-23-1/+14
|/ | | | | | | | | | | The kernel has different compatible strings for the pio block because the pin-muxing is different on all the different SoCs, but sunxi_gpio.c only support the basic gpio functionality, which is identical everywhere. Add the missing compatible strings for various SoC models. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* x86: broadwell: Add a GPIO driverSimon Glass2016-03-17-0/+208
| | | | | | | Add a GPIO driver for the GPIO peripheral found on broadwell devices. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Drop all the old pin configuration codeSimon Glass2016-03-17-11/+0
| | | | | | | | We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.1 at 2024-11-07 09:40:43 +0000