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path: root/drivers/ddr/altera
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* ddr: altera: Configuring SDRAM extra cycles timing parametersChin Liang See2016-10-27-0/+3
* ddr: altera: Repair DQ window centering codeMarek Vasut2016-04-20-8/+7
* ddr: altera: Staticize global variablesMarek Vasut2016-04-20-4/+4
* ddr: altera: Make DLEVEL behavior inclusiveMarek Vasut2016-04-20-66/+66
* ddr: altera: Zero DM IN delay in scc_mgr_zero_group()Marek Vasut2016-04-20-3/+13
* ddr: altera: Remove unnecessary ODT mode configMarek Vasut2016-04-20-1/+0
* ddr: altera: Remove unnecessary update of the SCCMarek Vasut2016-04-20-1/+0
* ddr: altera: Fix DRAM end value in protection ruleMarek Vasut2016-04-20-1/+1
* ddr: altera: Fix scc_mgr_set() argument orderMarek Vasut2016-04-20-1/+1
* ddr: altera: Tweak DQS tracking enable handlingMarek Vasut2016-04-20-2/+5
* ddr: altera: Replace ad-hoc constant with macroMarek Vasut2016-04-20-2/+2
* ddr: altera: Init the rule ID in debug codeMarek Vasut2016-01-16-0/+1
* ddr: altera: Repair uninited variableMarek Vasut2015-08-23-1/+1
* ddr: altera: Replace float multiplication with integer oneMarek Vasut2015-08-23-1/+1
* ddr: altera: sequencer: Clean checkpatch issuesMarek Vasut2015-08-08-71/+88
* ddr: altera: sequencer: Clean data typesMarek Vasut2015-08-08-48/+48
* ddr: altera: sequencer: Pluck out misc macros from codeMarek Vasut2015-08-08-22/+15
* ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VALMarek Vasut2015-08-08-49/+4
* ddr: altera: sequencer: Zap VFIFO_SIZEMarek Vasut2015-08-08-7/+4
* ddr: altera: sequencer: Wrap misc remaining macrosMarek Vasut2015-08-08-0/+2
* ddr: altera: sequencer: Pluck out IO_* macros from codeMarek Vasut2015-08-08-101/+100
* ddr: altera: sequencer: Wrap IO_* macrosMarek Vasut2015-08-08-0/+2
* ddr: altera: sequencer: Pluck out RW_MGR_* macros from codeMarek Vasut2015-08-08-154/+154
* ddr: altera: sequencer: Wrap RW_MGR_* macrosMarek Vasut2015-08-08-0/+4
* ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_initMarek Vasut2015-08-08-6/+8
* ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKSMarek Vasut2015-08-08-1/+0
* ddr: altera: sequencer: Zap unused params and macrosMarek Vasut2015-08-08-75/+5
* ddr: altera: sequencer: Move qts-generated files to board dirMarek Vasut2015-08-08-605/+9
* ddr: altera: sdram: Make sdram_start and sdram_end into u32Marek Vasut2015-08-08-11/+12
* ddr: altera: sdram: Minor cleanup in sdram_get_rule()Marek Vasut2015-08-08-4/+4
* ddr: altera: sdram: Minor cleanup in sdram_set_rule()Marek Vasut2015-08-08-4/+4
* ddr: altera: sdram: Add missing kerneldocMarek Vasut2015-08-08-0/+12
* ddr: altera: sdram: Clean up sdram_write_verify()Marek Vasut2015-08-08-25/+26
* ddr: altera: sdram: Clean up sdram_calculate_size() part 2Marek Vasut2015-08-08-23/+12
* ddr: altera: sdram: Clean up sdram_calculate_size() part 1Marek Vasut2015-08-08-9/+10
* ddr: altera: sdram: Introduce socfpga_sdram_get_config()Marek Vasut2015-08-08-211/+5
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 8Marek Vasut2015-08-08-1/+2
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 7Marek Vasut2015-08-08-1/+6
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 6Marek Vasut2015-08-08-10/+21
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 5Marek Vasut2015-08-08-10/+11
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 4Marek Vasut2015-08-08-62/+36
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 3Marek Vasut2015-08-08-28/+39
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 2Marek Vasut2015-08-08-67/+83
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 1Marek Vasut2015-08-08-44/+0
* ddr: altera: sdram: Introduce socfpga_sdram_config() structureMarek Vasut2015-08-08-162/+179
* ddr: altera: sdram: Clean up set_sdr_mp_threshold()Marek Vasut2015-08-08-13/+11
* ddr: altera: sdram: Clean up set_sdr_mp_pacing()Marek Vasut2015-08-08-21/+16
* ddr: altera: sdram: Clean up set_sdr_mp_weight()Marek Vasut2015-08-08-21/+16
* ddr: altera: sdram: Clean up set_sdr_fifo_cfg()Marek Vasut2015-08-08-7/+7
* ddr: altera: sdram: Clean up set_sdr_static_cfg()Marek Vasut2015-08-08-8/+7
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