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* 7450 and 86xx L2 cache invalidate bug correctionsWheatley Travis2008-05-09-2/+21
| | | | | | | | | | | | | | The 7610 and related parts have an L2IP bit in the L2CR that is monitored to signal when the L2 cache invalidate is complete whereas the 7450 and related parts utilize L2I for this purpose. However, the current code does not account for this difference. Additionally the 86xx L2 cache invalidate code used an "andi" instruction where an "andis" instruction should have been used. This patch addresses both of these bugs. Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com> Acked-By: Jon Loeliger <jdl@freescale.com>
* Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/masterWolfgang Denk2008-05-05-3/+6
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| * Allow building mips versions with ELDK 3.1.1Vlad Lungu2008-05-05-3/+6
| | | | | | | | | | | | .gpword works only with local symbols on certain binutils versions Signed-off-by: Vlad Lungu <vlad.lungu@windrvier.com>
* | Merge branch 'master' of /home/wd/git/u-boot/master/Wolfgang Denk2008-05-04-1/+17
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| * Merge branch 'master' of git://www.denx.de/git/u-boot-mipsWolfgang Denk2008-05-04-1/+17
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| | * [MIPS] cpu/mips/config.mk: Fix GNU assembler minor version pickerShinya Kuribayashi2008-05-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current trick to pick up GNU assembler minor version uses a dot(.) as a delimiter, and take the second field to obtain minor version number. But as can be expected, this doesn't work with a version string which has dots more than needs. Here's an example: $ mips-linux-gnu-as --version | grep 'GNU assembler' GNU assembler (Sourcery G++ Lite 4.2-129) 2.18.50.20080215 $ mips-linux-gnu-as --version | grep 'GNU assembler' | cut -d. -f2 2-129) 2 $ This patch restricts the version format to 2.XX.XX... This will work in most cases. $ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' 2.18.50.20080215 $ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2 18 $ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
| | * [MIPS] cpu/mips/cache.S: Add dcache_enableShinya Kuribayashi2008-05-03-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | Recent bootelf command fixes (017e9b7925f74878d0e9475388cca9bda5ef9482, "allow ports to override bootelf behavior") requires ports to have this function. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | Revert "ColdFire: Get information from the correct GCC"Wolfgang Denk2008-05-03-6/+6
|/ / | | | | | | | | This reverts commit b7166e05a513c0806b63b9dfb6f1d77645cede2a (replaced by commit c4e5f52a58d278eebb87f476e353972c5dacea40).
* | pxa: fix previous definition on cpu initJean-Christophe PLAGNIOL-VILLARD2008-05-03-5/+1
| | | | | | | | | | | | | | | | | | | | start.S:183:1: warning: "ICMR" redefined In file included from start.S:33: include/asm/arch/pxa-regs.h:935:1: warning: this is the location of the previous definition start.S:187:1: warning: "RCSR" redefined ... Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxWolfgang Denk2008-05-03-2/+5
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| * ppc4xx: Fix problem with DIMMs with 8 banks in 44x_spd_ddr2.cStefan Roese2008-04-30-2/+5
| | | | | | | | | | | | | | | | | | This patch fixes a problem with DIMMs that have 8 banks. Now the MCIF0_MBxCF register will be setup correctly for this setup too. This was noticed with the 512MB DIMM on Canyonlands/Glacier. Signed-off-by: Stefan Roese <sr@denx.de>
* | Fix calculation of I2C clock for some 86xx chipsTimur Tabi2008-04-30-1/+13
| | | | | | | | | | | | | | | | | | Some 86xx chips use CCB as the base clock for the I2C, and others used CCB/2. There is no pattern that can be used to determine which chips use which frequency, so the only way to determine is to look up the actual SOC designation and use the right value for that SOC. Signed-off-by: Timur Tabi <timur@freescale.com>
* | ColdFire: Get information from the correct GCCTsiChung Liew2008-04-30-6/+6
|/ | | | | Signed-off-by: Kurt Mahan <kmahan@freescale.com> Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* 85xx: Add -mno-spe to e500/85xx buildsKumar Gala2008-04-29-0/+1
| | | | | | | | | | | Newer gcc's might be configured to enable autovectorization by default. If we happen to build with one of those compilers we will get SPE instructions in random code. -mno-spe disables the compiler for automatically generating SPE instructions without our knowledge. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxWolfgang Denk2008-04-29-35/+14
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| * ppc4xx: Fix compilation warning in denali_spd_ddr2.cStefan Roese2008-04-29-0/+1
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Complete remove bogus dflush()Stefan Roese2008-04-29-33/+5
| | | | | | | | | | | | | | | | | | | | Since the current dflush() implementation is know to have some problems (as seem on lwmon5 ECC init) this patch removes it completely and replaces it by using clean_dcache_range(). Tested on Katmai with ECC DIMM. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Fixup ebc clock in FDT for 405GP/EPMarkus Brunner2008-04-29-2/+8
| | | | | | | | | | | | | | | | On ppc405EP and ppc405GP (at least) the ebc is directly attached to the plb and not to the opb. This patch will try to fixup /plb/ebc if /plb/opb/ebc doesn't exist. Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
* | 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docsKumar Gala2008-04-29-4/+4
| | | | | | | | | | | | | | All the 85xx and 86xx UM describe the register as timing_cfg_3 not as ext_refrec. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 85xx: Additional fixes and cleanup of MP codeKumar Gala2008-04-29-2/+7
|/ | | | | | | | | | | | | | | | | * adjust __spin_table alignment to match ePAPR v0.94 spec * loop over all cpus when determing who is up. This fixes an issue if the "boot cpu" isn't core0. The "boot cpu" will already be in the cpu_up_mask so there is no harm * Added some protection in the code to ensure proper behavior. These changes are explicitly needed but don't hurt: - Added eieio to ensure the "hot word" of the table is written after all other table updates have occurred. - Added isync to ensure we don't prefetch loading of table entries until we a released These issues we raised by Dave Liu. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xxWolfgang Denk2008-04-26-8/+0
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| * mpc83xx: remove the unused CPM's stuffDave Liu2008-04-25-8/+0
| | | | | | | | | | | | The MPC83xx family never have CPM block, so remove it from 83xx. Signed-off-by: Dave Liu <daveliu@freescale.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxWolfgang Denk2008-04-26-0/+42
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| * ppc4xx: Pass PCIe root-complex/endpoint configuration to Linux via the fdtStefan Roese2008-04-25-0/+42
| | | | | | | | | | | | | | | | | | | | The PCIe root-complex/endpoint setup as configured via the "pcie_mode" environment variable will now get passed to the Linux kernel by setting the device_type property of the PCIe device tree node. For normal root- complex configuration it will keep its defaults value of "pci" and for endpoint configuration it will get changed to "pci-endpoint". Signed-off-by: Stefan Roese <sr@denx.de>
* | USB: fix more GCC 4.2.x aliasing warningsWolfgang Denk2008-04-25-6/+6
| | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Markus Klotzbuecher <mk@denx.de>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-at91Wolfgang Denk2008-04-25-47/+23
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| * | ARM: Davinci: Fix DM644x timer overflow handling and cleanupDirk Behme2008-04-22-47/+23
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix ARM based DaVinci DM644x timer overflow handling and cleanup timer code. Changes: - Remove *_masked() functions as noted by Wolfgang - Adapt register naming to recent TI spec (sprue26, March 2007) - Fix reset_timer() handling - As reported by Pieter [1] the overflow fix introduced a delay of factor 16 (e.g 2 seconds became 32). While the overflow fix is basically okay, it missed to divide udelay by 16, too. Fix this. [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179 - Remove software division of timer count value (DIV(x) macro) and do it in hardware (TIM_CLK_DIV). Many thanks to Troy Kisky <troy.kisky@boundarydevices.com> and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for the hints & testing! Patch is compile tested with davinci_dvevm & sonata & schmoogie configuration and tested by Pieter on DaVinci EVM hardware. Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
* | lib_ppc: Revert "Make MPC83xx one step closer to full relocation."Kim Phillips2008-04-25-7/+4
| | | | | | | | | | | | | | | | This reverts commit 70431e8a7393b6b793f77957f95b999fc9a269b8 which has proven problematic getting right from the start at least on 83xx and 4xx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | 85xx: Round up frequency calculations to get reasonable outputKumar Gala2008-04-24-7/+6
| | | | | | | | | | | | | | | | | | | | | | eg. because of rounding error we can get 799Mhz instead of 800Mhz. Introduced DIV_ROUND_UP and roundup taken from linux kernel. Signed-off-by: Dejan Minic <minic@freescale.com> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxWolfgang Denk2008-04-24-2/+31
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| * 85xx: Fix size of cpu-release-addr propertyKumar Gala2008-04-18-1/+1
| | | | | | | | | | The cpu-release-addr is defined as always being a 64-bit quanity regardless if we are running on a 32-bit or 64-bit machine.
| * Fix calculation of I2C clock for some 85xx chipsTimur Tabi2008-04-18-1/+30
| | | | | | | | | | | | | | | | | | | | | | Some 85xx chips use CCB as the base clock for the I2C. Some use CCB/2, and some use CCB/3. There is no pattern that can be used to determine which chips use which frequency, so the only way to determine is to look up the actual SOC designation and use the right value for that SOC. Update immap_85xx.h to include the GUTS PORDEVSR2 register. Signed-off-by: Timur Tabi <timur@freescale.com>
* | ppc4xx: Add dcache_enable() for 440Stefan Roese2008-04-22-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | dcache_enable() was missing for 440 and the patch 017e9b7925f74878d0e9475388cca9bda5ef9482 ["allow ports to override bootelf "] behavior uses this function. Note: Currently the cache handling functions like d/icache_disable/enable() are NOP's on 440. This may be changed in the future. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Fix sys_get_info() for 405GP(r)Matthias Fuchs2008-04-21-0/+2
|/ | | | | | | | This patch assigns the correct EBC clock for 405GP(r) CPUs to PPC4xx_SYS_INFO structure. Without this patch U-Boot uses an uninitialized EBC clock in its startup message. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* Fix crash on sequoia in ppc_4xx_eth_initAnatolij Gustschin2008-04-18-0/+4
| | | | | | | | Currently U-Boot crashes in ppc_4xx_eth_init on sequoia with cache enabled (TLB Parity exeption). This patch fixes the problem. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* ppc4xx: Fix crash on sequoia with cache enabledAnatolij Gustschin2008-04-18-1/+3
| | | | | | | | | | | Currently U-Boot crashes on sequoia board in CPU POST if cache is enabled (CONFIG_4xx_DCACHE defined). The cache won't be disabled by change_tlb before CPU POST because there is an insufficient adress range check since CFG_MEM_TOP_HIDE was introduced. This patch tries to fix this problem. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* Use jr as register jump instructionShinya Kuribayashi2008-04-18-6/+6
| | | | | | | | | | Current assembler codes are inconsistent in the way of register jump instruction usage; some use jr, some use j. Of course GNU as allows both usages, but as can be expected from `Jump Register' the mnemonic `jr' is more intuitive than `j'. For example, Linux doesn't have `j <reg>' usage at all. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* Remove all the search paths from the .lds files.Jason Wessel2008-04-17-6/+0
| | | | | | | The cross compiler is responsible for providing the correct libraries and the logic to find the linking libraries. Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
* Fix regression introduced by a typo in "Tidied other cpu/arm920t/start.S code"Guennadi Liakhovetski2008-04-17-1/+1
| | | | | | | | | | | | | | Restore logic reverted by commit commit 80767a6cead9990d9e77e62be947843c2c72f469 Author: Peter Pearse <peter.pearse@arm.com> Date: Wed Sep 5 16:04:41 2007 +0100 Changed API name to coloured_led.h Removed code using deprecated ifdef CONFIG_BOOTBINFUNC Tidied other cpu/arm920t/start.S code Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
* cpu/mips/cpu.c: Fix flush_cache bugShinya Kuribayashi2008-04-17-2/+2
| | | | | | | Cache operations have to take line address (addr), not start_addr. I noticed this bug when debugging ping failure. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
* core support for Freescale mx31Sascha Hauer2008-04-13-0/+478
| | | | | | | This patch adds the core support for Freescale mx31 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
* Fix compile errorWolfgang Denk2008-04-13-1/+1
| | | | | | ...as suggested by Peter Pearse Signed-off-by: Wolfgang Denk <wd@denx.de>
* Separate omap24xx specific code from arm1136Sascha Hauer2008-04-13-38/+94
| | | | | | | | Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
* Coding Style cleanup; update CHANGELOGWolfgang Denk2008-04-13-12/+14
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xxWolfgang Denk2008-04-13-2/+2
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| * mpc83xx: Update DIMM data bus width test to support 40-bit widthLee Nipper2008-04-11-2/+2
| | | | | | | | | | | | | | | | 32-bit wide ECC memory modules report 40-bit width. Changed the DIMM data bus width test to 'less than 64' instead of 'equal 32'. Signed-off-by: Lee Nipper <lee.nipper@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxWolfgang Denk2008-04-13-3/+7
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| * | 85xx: Fix detection of MP cpu spin upKumar Gala2008-04-11-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | We were looking at the wrong memory offset to determine of a secondary cpu had been spun up or not. Also added a warning message if the all the secondary cpus we expect don't spin up. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | 85xx: Use SVR_SOC_VER instead of SVR_VERKumar Gala2008-04-11-2/+2
| |/ | | | | | | | | | | | | | | The recent change introduced by 'Update SVR numbers to expand support' now requires that we use SVR_SOC_VER instead of SVR_VER if we want to compare against a particular processor id. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-sparcWolfgang Denk2008-04-13-0/+6679
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