| Commit message (Expand) | Author | Age | Lines |
* | fsl-ddr: setup ODT_RD_CFG & ODT_WR_CFG when we interleave | Dave Liu | 2010-01-05 | -0/+3 |
* | fsl-ddr: add override for the Rtt_Wr | Dave Liu | 2010-01-05 | -3/+7 |
* | fsl-ddr: add the override for write leveling | Dave Liu | 2010-01-05 | -6/+15 |
* | fsl-ddr: Fix power-down timing settings | Dave Liu | 2010-01-05 | -3/+4 |
* | fsl-ddr: Fix the chip-select interleaving issue | Dave Liu | 2009-11-12 | -4/+3 |
* | mpc8xxx: improve LAW error messages when setting up DDR | Paul Gortmaker | 2009-10-16 | -4/+5 |
* | ppc/8xxx: Misc DDR related fixes | Kumar Gala | 2009-09-15 | -7/+7 |
* | ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist | Kumar Gala | 2009-09-08 | -23/+0 |
* | 85xx, 86xx: Add common board_add_ram_info() | Peter Tyser | 2009-07-22 | -41/+98 |
* | fsl_ddr: Fix DDR3 calculation of rank density with 8GB or more | Timur Tabi | 2009-07-01 | -1/+1 |
* | fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT | Kumar Gala | 2009-06-12 | -39/+41 |
* | fsl-ddr: add the DDR3 SPD infrastructure | Dave Liu | 2009-03-30 | -46/+754 |
* | fsl-ddr: Fix two bugs in the ddr infrastructure | Dave Liu | 2009-03-30 | -1/+4 |
* | fsl-ddr: Allow system to boot if we have more than 4G of memory | Kumar Gala | 2009-02-16 | -1/+1 |
* | fsl-ddr: ignore memctl_intlv_ctl setting if only one DDR controller | Kumar Gala | 2009-02-16 | -0/+4 |
* | fsl-ddr: use the 1T timing as default configuration | Dave Liu | 2009-01-23 | -1/+1 |
* | fsl-ddr: make the self refresh idle threshold configurable | Dave Liu | 2009-01-23 | -4/+8 |
* | fsl-ddr: clean up the ddr code for DDR3 controller | Dave Liu | 2009-01-23 | -11/+13 |
* | fsl-ddr: update the bit mask for DDR3 controller | Dave Liu | 2009-01-23 | -4/+8 |
* | fsl ddr skip interleaving if not supported. | Ed Swarthout | 2008-12-03 | -12/+17 |
* | Add debug information for DDR controller registers | Haiying Wang | 2008-10-18 | -0/+13 |
* | Check DDR interleaving mode | Haiying Wang | 2008-10-18 | -5/+112 |
* | Pass dimm parameters to populate populate controller options | Haiying Wang | 2008-10-18 | -87/+7 |
* | Make DDR interleaving mode work correctly | Haiying Wang | 2008-10-18 | -12/+54 |
* | rename CFG_ macros to CONFIG_SYS | Jean-Christophe PLAGNIOL-VILLARD | 2008-10-18 | -7/+7 |
* | Coding style cleanup, update CHANGELOG | Wolfgang Denk | 2008-09-13 | -15/+15 |
* | Fix compiler warning in mpc8xxx ddr code | Kumar Gala | 2008-09-07 | -2/+4 |
* | FSL DDR: Add DDR2 DIMM paramter support | Kumar Gala | 2008-08-27 | -0/+339 |
* | FSL DDR: Add DDR1 DIMM paramter support | Kumar Gala | 2008-08-27 | -0/+343 |
* | FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. | Kumar Gala | 2008-08-27 | -0/+2418 |