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path: root/cpu/mpc8xxx/ddr/ctrl_regs.c
Commit message (Expand)AuthorAgeLines
* Add debug information for DDR controller registersHaiying Wang2008-10-18-0/+13
* Make DDR interleaving mode work correctlyHaiying Wang2008-10-18-12/+49
* Fix compiler warning in mpc8xxx ddr codeKumar Gala2008-09-07-2/+4
* FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.Kumar Gala2008-08-27-0/+993