summaryrefslogtreecommitdiff
path: root/cpu/mpc85xx
Commit message (Expand)AuthorAgeLines
* kgdb: cpu/mpc* cpu/74xx: include kgdb.h when neededMike Frysinger2010-02-08-0/+1
* 85xx: Add support for 'cpu disable' commandKumar Gala2010-01-26-2/+26
* Add support to disable cpu's in multicore processorsKumar Gala2010-01-26-1/+7
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-01-26-9/+32
|\
| * qe: fixup the snum for MPC8569 Rev2.0Liu Yu2010-01-25-0/+18
| * Fix the local bus divider mappingDave Liu2010-01-25-1/+6
| * Revert "ppc/p4080: Fix reporting of PME & FM clock frequencies"Kumar Gala2010-01-25-6/+6
| * ppc/p4080: Fix mask width of RCW fields MEM_PLL_RAT, SYS_PLL_RATJames Yang2010-01-25-2/+2
* | ppc: remove -ffixed-r14 gcc option.Joakim Tjernlund2010-01-26-1/+1
* | ppc: Use r12 instead of r14 as GOT pointer.Joakim Tjernlund2010-01-26-5/+6
* | ppc: Loose GOT access in IRQJoakim Tjernlund2010-01-26-30/+3
|/
* kgdb: drop duplicate debugger_exception_handlerMike Frysinger2010-01-18-4/+0
* ppc/p4080: Fix reporting of PME & FM clock frequenciesKumar Gala2010-01-05-6/+6
* ppc/85xx: Map boot page guarded for MP bootKumar Gala2010-01-05-3/+3
* p4080: add readback to bootpage translation windowDave Liu2010-01-05-0/+3
* ppc/85xx: Make SPD DDR TLB setup code use dynamic entry allocationKumar Gala2010-01-05-6/+6
* ppc/85xx: Add tracking of TLB CAM usageKumar Gala2010-01-05-0/+65
* 85xx: Add support to set DPAA (data path) devices clock frequenciesKumar Gala2010-01-05-0/+36
* 85xx: Add support for e500mc cache stashingKumar Gala2010-01-05-1/+43
* common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOULHeiko Schocher2009-12-08-4/+0
* Merge branch 'master' into nextWolfgang Denk2009-11-15-6/+10
|\
| * ppc/85xx: Fix how we determine the number of CAM entriesKumar Gala2009-11-13-2/+2
| * ppc/85xx: Fix misc L2 cache enabling bugDave Liu2009-10-31-4/+8
* | ppc/85xx: make boot from NAND full relocation to RAMMingkai Hu2009-11-13-1/+0
|/
* Coding Style cleanup; update CHANGELOG, prepare -rc1v2009.11-rc1Wolfgang Denk2009-10-28-29/+29
* mpc85xx: Add eSDHC support for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-0/+4
* 85xx: MP Boot Page Translation updatePeter Tyser2009-10-27-31/+78
* ppc/85xx: Fix crashes due to generation of SPE instructionLeon Woestenberg2009-10-26-0/+5
* ppc/85xx: Make L2 support more robustDave Liu2009-10-26-1/+4
* relocation: Do not relocate NULL pointers.Joakim Tjernlund2009-10-08-2/+4
* 85xx: Ensure BSS segment isn't linked at address 0Peter Tyser2009-10-08-0/+11
* ppc: Enable full relocation to RAMPeter Tyser2009-10-03-1/+0
* ppc/p4080: Determine various chip frequencies on CoreNet platformsKumar Gala2009-09-24-4/+127
* ppc/p4080: Handle timebase enabling and frequency reportingKumar Gala2009-09-24-1/+22
* ppc/p4080: Add various p4080 related defines (and p4040)Kumar Gala2009-09-24-0/+1
* ppc/p4080: CoreNet platfrom style secondary core releaseKumar Gala2009-09-24-3/+65
* ppc/p4080: CoreNet platfrom style CCSRBAR settingKumar Gala2009-09-24-18/+54
* ppc/85xx: Fix enabling of L2 cacheKumar Gala2009-09-24-3/+4
* 85xx-fdt: Fixed l2-ctlr's compatible prop for QorIQVivek Mahajan2009-09-24-3/+10
* ppc/85xx: add cpu init config file for boot from NANDMingkai Hu2009-09-24-0/+63
* ppc/85xx: add ld script file for boot from NANDMingkai Hu2009-09-24-0/+67
* ppc/85xx: Disable all async interrupt sources when we bootKumar Gala2009-09-15-0/+11
* ppc/85xx: Split out cpu_init_early into its own file for NAND_SPLKumar Gala2009-09-15-51/+77
* ppc/85xx: Change cpu_init_early_f so we can use with NAND SPLKumar Gala2009-09-15-9/+25
* ppc/85xx: add boot from NAND/eSDHC/eSPI supportMingkai Hu2009-09-15-1/+181
* ppc/85xx: Move code around to prep for NAND_SPLKumar Gala2009-09-15-23/+23
* ppc/85xx: Repack tlb_table to save spaceKumar Gala2009-09-15-4/+5
* ppc/85xx: Introduce low level write_tlb functionKumar Gala2009-09-15-14/+26
* ppc/85xx: Remove some bogus code from external interrupt handler.Scott Wood2009-09-15-8/+1
* ppc/85xx: Ensure that MAS8 is zero when writing TLB entries.Scott Wood2009-09-15-0/+7