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path: root/cpu/mpc85xx/tlb.c
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* ppc: Move cpu/$CPU to arch/ppc/cpu/$CPUPeter Tyser2010-04-13-277/+0
* ppc/85xx: Make SPD DDR TLB setup code use dynamic entry allocationKumar Gala2010-01-05-6/+6
* ppc/85xx: Add tracking of TLB CAM usageKumar Gala2010-01-05-0/+64
* ppc/85xx: Fix how we determine the number of CAM entriesKumar Gala2009-11-13-2/+2
* ppc/85xx: add boot from NAND/eSDHC/eSPI supportMingkai Hu2009-09-15-0/+2
* ppc/85xx: Move code around to prep for NAND_SPLKumar Gala2009-09-15-23/+23
* ppc/85xx: Repack tlb_table to save spaceKumar Gala2009-09-15-4/+5
* ppc/85xx: Introduce low level write_tlb functionKumar Gala2009-09-15-13/+3
* ppc/85xx: Ensure that MAS8 is zero when writing TLB entries.Scott Wood2009-09-15-0/+3
* ppc/85xx: Add a simple function to search the TLBKumar Gala2009-09-08-0/+27
* Prepare 2009.08-rc3v2009.08-rc3Wolfgang Denk2009-08-22-1/+1
* 85xx: Fix addrmap to include memoryKumar Gala2009-08-14-6/+22
* 85xx: Use print_size to report amount of memory not mapped by TLBsKumar Gala2009-06-12-1/+1
* 85xx: bugfix for reading maximum TLB size on mpc85xxFredrik Arnerup2009-06-09-1/+1
* 85xx: Fix how we map DDR memoryKumar Gala2009-02-16-47/+27
* Change DDR tlb start entry to CONFIG param for 85xxHaiying Wang2009-01-13-1/+5
* 85xx: Add support to populate addr map based on TLB settingsKumar Gala2008-12-19-0/+34
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-1/+1
* FSL DDR: Add e500 TLB helper for DDR codeKumar Gala2008-08-27-0/+64
* Coding Style Cleanup; update CHANGELOGWolfgang Denk2008-01-23-1/+0
* 85xx: Get ride of old TLB setup codeKumar Gala2008-01-17-2/+0
* 85xx: Introduce new tlb APIKumar Gala2008-01-17-0/+95
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