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* MLK-10674-1 imx: mx6qpsabreauto Update to 1.05 DDR ScriptPeng Fan2015-04-29-1/+9
| | | | | | | | | | | | | | | | | | | | Update to 1.05 ddr script, url: http://compass.freescale.net/livelink/livelink?func=ll& objId=233944823&objAction=browse&viewType=1 File name: arik_r2_sabre_ddr3_528_1.05c.inc Update: Read latency Aging control for IPU1/PRE0/PRE3 Aging control for IPU2/PRE1/PRE2 Test results: 3 boards passed overnight memtester stress test. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit b8625b732cfc59e44955f0e23b581e7896be1733)
* MLK-10504 imx: mx6dqarm2: Fix CCM setting for lpddr2 400Mhz supportYe.Li2015-04-29-0/+6
| | | | | | | | | | | | | | | | | | Current uboot supports for running LPDDR2 at 400MHz on MX6Q ARM2 board, but there is a problem in switching pre_periph_clk_sel to pll2_pfd2. We cannot directly change the parent of pre_periph_clk_sel as this mux is not a glitchless mux. We need to follow the correct procedure and wait for the busy bits to clear before switching. Change to follow the procedure: 1. Set periph_clk2 to OSC. 2. Switch the periph_clk to periph_clk2, checking the CCM_CDHIPR for periph_clk , ahb_podf and axi_podf busy bits. 3. Setting the pre_periph_clk to PLL2 PFD 396M. 4. Switch the periph_clk back to pre_periph_clk and checking CCM_CDHIPR busy bits. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 7490062ff86e1132b95bf153091f28f7940c0cf9)
* MLK-10658 imx: mx7d 12x12 arm2: Update plugin codes to use latest DDR scriptYe.Li2015-04-29-23/+27
| | | | | | | | | | The LPDDR3 intialization in plugin codes were missed to update in previous DDR script upgrading. So update the plugin codes to LPDDR3 script: 7D_lpddr3_0_2.ds5 Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 1874cec3a70adde2ea911a9c155fb41c43ccab61)
* MLK-10617 imx: mx7d 12x12 arm2: Update LPDDR3 script to 7D_lpddr3_0_2.ds5Ye.Li2015-04-29-1/+1
| | | | | | | | | | | | | | | [The compass link for this script] http://compass.freescale.net/livelink/livelink?func=ll&objid=233861153 &objAction=browse&sort=name [Changes in the script] This script enable MDLL, but make it much more margin for the unlock state . [DDR stress test result] 2 boards run the memtester for 3 days, and passed. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 6fa6765b0dcdad8d414931e49edf6ba65a73d23a)
* MLK-10522-3: imx: mx7d_12x12_ddr3_arm2: add target board supportAdrian Alonso2015-04-29-0/+687
| | | | | | | | | | | | | | * Add mx7d_12x12_ddr3_arm2 target board support * Initial support for mx7d_12x12_ddr3_arm2 target board add support for base hardware eMMC, SD and ECSPI boot. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 51d69f7996cc6e6da8bb3f0af751549cb2435e44) Conflicts: boards.cfg
* MLK-10568 imx: mx7d arm2: Update LPDDR3 script to 7D_lpddr3_0_1.ds5Ye.Li2015-04-29-19/+16
| | | | | | | | | | | | | | | | | | | | | | [The compass link for this script] http://compass.freescale.net/livelink/livelinkfunc=ll&objid=233861153 &objAction=browse&sort=name [Changes in the script] 1. Change the DDR freq to 528Mhz. 2. Disable ddr phy dll, just force a dll output. IC suspects the dll in ddr phy may unlock sometimes. The side-effect is we will lost the ability to compensate the voltage/temperature change, so it may easy to fail at H/L temperature. [DDR stress test result] 3 boards involved the two days stress test by using memtester tool. One board met a kernel oops after one day test. Other two pass the two days test. Compared to previous DDR script, the result is much positive. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 843c3c54af12cbf20e7bc912178e5a3628b78198)
* MLK-10567: Extend u-boot imximage to support check bits set/clrNitin Garg2015-04-29-7/+7
| | | | | | | | | | | Add support for HAB "Check data" all bits set and clear check functionality. Rename CHECK_DATA to CHECK_BITS_SET. Flag=0 -> (*address & mask) == 0 | All bits clear Flag=2 -> (*address & mask) == mask | All bits set Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit 0836912ef7a53d1f3d65f95556a34d03b8d65399)
* MLK-10774-41 imx: mx6sx: update VDDSOC standby voltagePeng Fan2015-04-29-0/+18
| | | | | | | | | | | | | This patch is from commit "f2c5102bf3763d77a227c1cba7fcd49e3db53a1d". " According the latest datasheet Rev.0,2/2015, the VDDSOC_IN voltage in standby/DSM mode is 1.05V. As we use PFM mode of pFuse and this mode has 3% tolerance issue, so the standby mode voltage should be (1.05 * 1.03) = 1.0815, we use 1.10V as the minimal step is 25mV. For i.MX6sx SDB RevB boards, the VDDARM and VDDSOC use the same supply, so the DSM voltage for VDDARM also need to be updated. " Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10492-2 imx: mx7dsabresd: Add TFT43AB LCD supportYe.Li2015-04-29-9/+9
| | | | | | | | The mx7dsabresd uses new LCD TFT43AB which has 480 x 272 pixels. Update panel info for this LCD. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit e77d667b20956a37de9d367a8914ef2fe79258df)
* MLK-10477-5 imx: mx7dsabresd: Add EPDC supportYe.Li2015-04-29-75/+250
| | | | | | | | | | | | | | | | To enable the EPDC feature: 1. Uncomments CONFIG_SPLASH_SCREEN and CONFIG_MXC_EPDC settings in mx7dsabresd.h 2. cd <kernel_dir>/firmware/imx 3. python ihex2bin.py -i epdc_ED060XD4C1_TC.fw.ihex -o epdc_splash.bin 4. cp epdc_splash.bin to [FAT partition on SD card] Since the EPDC has pinmux conflicts with ENET and QSPI. These two modules can't work at same time. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 8ba7f88f9efac9f90319b71644d3d1191f535d03)
* MLK-10477-4 imx: mx7d 12x12 lpddr3 ARM2: Add EPDC supportYe.Li2015-04-29-0/+257
| | | | | | | | | | | | | To enable the EPDC feature: 1. Uncomments CONFIG_SPLASH_SCREEN and CONFIG_MXC_EPDC settings in mx7d_12x12_lpddr3_arm2.h 2. cd <kernel_dir>/firmware/imx 3. python ihex2bin.py -i epdc_ED060XD4C1_TC.fw.ihex -o epdc_splash.bin 4. cp epdc_splash.bin to [FAT partition on SD card] Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 414824dcb77a067213849d340cf92777e6546810)
* MLK-10478 mx6: EPDC: Improve EPDC usage and configurationYe.Li2015-04-29-145/+53
| | | | | | | | | | | | | | Change to load EPDC waveform from FAT partition and allocate waveform buffer, framebuffer and working buffer in dynamic manner not static. So many EPDC configurations are removed. To enable the EPDC feature, must define CONFIG_MXC_EPDC and CONFIG_SPLASH_SCREEN. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 4d55a4124be3a3a6288c3c845d17fd9d4f2b8b43) Conflicts: include/configs/mx6slevk.h
* MLK-10476 imx: mx7dsabresd: Fix 74LV driver issueYe.Li2015-04-29-8/+9
| | | | | | | | | Should write the bits to SDI in reverse order because of the bits will be shifted. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 83389e054d3cb7a905a3f81c20f395e784beb258) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-39 imx:mx6qsabreauto update video settingsPeng Fan2015-04-29-7/+91
| | | | | | Update video settings Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-38 imx: fix ecspi codePeng Fan2015-04-29-0/+20
| | | | | | | | | | | This commit 155fa9af95ac5be857a7327e7a968a296e60d4c8 "spi: mxc: fix sf probe when using mxc_spi" introduces "board_spi_cs_gpio" function to discard gpio in CONFIG_SF_DEFAULT_CS for spi flash. Follow this rule to make imx boards work fine. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10448-6 imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board supportYe.Li2015-04-29-1/+339
| | | | | | | | | | | | | | | | | | 1. Add DDR script v1.04 for i.MX6DQP SABREAUTO board. 2. On CPU3 board, enet RGMII tx clock is from internal PLL. Set the GPR5[9] and init the enet pll output to 125Mhz. 3. On CPU3 board, SW1ABC=VDDSOC_IN, SW2=VDDARM_IN. Build target: mx6qpsabreauto_config Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit e0b316f071aa17c8e41a50f395346ab9f012e665) Conflicts: board/freescale/mx6qsabreauto/mx6qsabreauto.c boards.cfg
* MLK-10446: mx7d_12x12_lpddr3_arm2: Enable 1.8V on PHY ctrlFabio Estevam2015-04-29-2/+0
| | | | | | | | | | Enable 1.8V on PHY control, so that Gigabit PHY operation can be functional. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit a17f1300a1b6d3b46a090baa84ba2fef104a1af6) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-37 imx:mx7d fix qspi probe errorPeng Fan2015-04-29-6/+6
| | | | | | We should use CONFIG_FSL_QSPI, but not CONFIG_QSPI Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-35 imx:mx7 use power_init_boardPeng Fan2015-04-29-80/+48
| | | | | | | Upgrade to upstream way, using power_init_board. Add pfuze300 support. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10385-4 imx: mx7dsabresd: Add board codes for NAND flash supportYe.Li2015-04-29-22/+25
| | | | | | | | | | | | | | | Update board codes to support GPMI NAND flash. Since the GPMI NAND needs board rework, it is disabled at default. Two ways to enable GPMI NAND: 1. Define CONFIG_SYS_BOOT_NAND for NAND boot case 2. Modify the line 306 in mx7dsabresd.h from QSPI to NAND. #define CONFIG_SYS_USE_QSPI /* Enable the QSPI flash at default */ to #define CONFIG_SYS_USE_NAND /* Enable the NAND flash at default */ Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 5db03facf3add6a95728bc97ac2300003a103932) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10363-3 Android: Add android support for MX7D SABRESD boardYe.Li2015-04-29-0/+103
| | | | | | | | | | | | Enable android fastboot, recovery, booti features for mx7d sabresd board by using new build target: mx7devkandroid_config Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit bfc2b467ddac9c6eccb3f39aad3663a959546b64) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: boards.cfg
* MLK-10774-33 imx:mx6 add udc and fastboot supportPeng Fan2015-04-29-1/+667
| | | | | | | | | | | | Add udc and fastboot support We did not use the upstream way. Currently use CI_UDC and USB_GAGDET of upstream can make fastboot work, but lack of flash operation, so we still use our way. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-10774-32 imx:mx6slevk inlcude crm_regs.hPeng Fan2015-04-29-0/+1
| | | | | | Add missed included header file crm_regs.h Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10215 Add elan init in i.MX6SL-EVK boardHaibo Chen2015-04-29-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | EPDC board contain a elan touch screen, this screen is a i2c slave. If this EPDC board connect to i.MX6SL-EVK board, after uboot boot up, if we do i2c operation, like i2c probe, then the i2c bus block. This is due to the elan touch screen i2c slave. This device needs to do some initialization opearation before its i2c operation, otherwise this i2c device pull down the i2c clk line, and make the i2c bus hang. This means elan needs a special flow on i2c before its address is acked, otherwise the i2c bus will be hang. This patch is a workaround, it add a void function which is defined as a weak symbol in i2c driver, and it is called before every i2c operation. In mx6slevk, this function was overwrite to execute elan initialization. So that, for mx6slevk board, it will initialize elan before every i2c operation, but for other boards, it just work as before. Signed-off-by: Haibo Chen <haibo.chen@freescale.com> (cherry picked from commit 4c587b29c423ce61b2471ed20f31ff533d9d8a39) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: arch/arm/include/asm/arch-mx6/mx6sl_pins.h board/freescale/mx6slevk/mx6slevk.c
* MLK-10370: imx7d-12x12-arm2 imximage: update dcd table for lpddr3Adrian Alonso2015-04-29-14/+22
| | | | | | | | | | | * Update DCD table for lpddr3 @400Mhz * Boot kernel linux and run memtester for memory stress memtester 1G 100000 Signedoff-by: Ye.Li <B37916@freescale.com> Signed-off-by: Adrian Alonso <aalonso@freescale.com> (cherry picked from commit 7cbab5830d486733a691be104cbc2be494b00776) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10362 imx: mx7dsabresd: Add support for MX7D SABRESD boardPeng Fan2015-04-29-0/+1170
| | | | | | | | | | | | | | | Add i.MX7D SABRESD board BSP codes, with enabled modules: UART, PMIC, USB/OTG, SD, eMMC, ENET, I2C, 74LV IOX. Build target: mx7dsabresd_config Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 3bf52a153e2964d4fdc17f0e8cb816686cbb6c2b) Conflicts: boards.cfg
* MLK-10361 imx: mx7d arm2: Change to use WDOG_B resetYe.Li2015-04-29-2/+12
| | | | | | | | | | | | | | | | | | | | | The default u-boot reset is a internal WDOG reset (warm reset on i.MX6) which does not have power and DDR reset. So the peripherals and DDR may meet problem. When using the internal WDOG reset on i.MX7D ARM2 boards, we meets two DDR issues: 1. On 12x12 ARM2, sometimes the system may hang in DCD because the DDRC Operating Mode does not become to normal. 2. On 19x19 ARM2, the reset always brings system to USB download because the DDR3 turns to unstable. On the i.MX7D ARM2 board, the WDOG_B signal connects to POR_B or PMIC_PWRON. This gives a chance to use a stronger reset. So in this patch, we set the IOMUX for WDOG_B pin and enable WDOG_B signal output in WDOG WCR register. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 1192501c1fcf3b266eb22639a6bc93ac7c03b367) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10351 imx: mx7d: Add 19x19 DDR3L ARM2 board supportYe.Li2015-04-29-0/+1008
| | | | | | | | | | | | | | | Add BSP codes, configuration head file and build target for 19x19 DDR3L ARM2 board with basic functions: ENET2, I2C, SD/eMMC/MMC, USB, QSPI, ECSPI, pfuze3000 PMIC. Build target: mx7d_19x19_ddr3_arm2_config Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 58fd869e3097b7461fbfae3d94e3ebbd30ae2474) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: boards.cfg
* MLK-10191-3 imx: mx7: Add support for i.MX7D 12x12 LPDDR3 ARM2 boardYe.Li2015-04-29-0/+985
| | | | | | | | | | | | | | | | Add BSP codes, configuration head file and build target for 12x12 LPDDR3 ARM2 board with basic functions: ENET, I2C, SD/eMMC/MMC, USB, LCD Splash screen, QSPI, ECSPI, pfuze3000 PMIC. Note: pmic and video is still not upstream way Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit ac0d51ef07fdec880e6da318c08d521506640efa) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: boards.cfg
* MLK-10774-22 imx:mx6sx_arm2 add mx6sx arm2 bspPeng Fan2015-04-29-0/+2919
| | | | | | | Add bsp and configuration file Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-21 imx:imx6sxsabreauto add bspPeng Fan2015-04-29-0/+1142
| | | | | | | Add bsp and configuration file Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-20 imx:mx6 add plugin supportPeng Fan2015-04-29-10/+2548
| | | | | | Add plugin support Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-19 imx:mx6qsabreauto update bspPeng Fan2015-04-29-102/+461
| | | | | | Update bsp and add configuration file Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-18 imx:mx6qarm2 update bspPeng Fan2015-04-29-6/+279
| | | | | | Update bsp and add configuration file Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-17 imx:mx6sabresd update bspPeng Fan2015-04-29-441/+726
| | | | | | Update bsp and add configuration file Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-16 imx:mx6sxsabresd update board and configPeng Fan2015-04-29-49/+461
| | | | | | | | | Update mx6sxsabresd board and config file Note: Fastboot Android support is not added. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-15 imx:mx6slevk update board codePeng Fan2015-04-29-8/+148
| | | | | | | | | | | Update board header and bsp code in board/freescale/mx6slevk Update board config file Note: Fastboot will be added in future Android config is not included. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-5 Add EPDC splash screen for MX 6DL SabreSD and 6SL EVKPeng Fan2015-04-29-0/+657
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add EPDC splash screen feature for MX6SL EVK, and MX6DL SABRESD board. - Currently, splash screen consists of a simple black border around a white screen. Done this way to save in memory footprint. - EPDC splash screen is disabled by default in the config file for MX6DL_SABRESD and MX6SL_EVK. If left enabled, the U-Boot image will not boot correctly (hang), since some additional content on the boot device (waveform file) is required for EPDC splash to work correctly. Please refer to Linux Reference Manual for how to flash WAVEFORM file. Signed-off-by: Robby Cai <R63905@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit b8ab9b3eabb94bbbc1eea63e7c0e2a87d2d645f4) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: arch/arm/include/asm/arch-mx6/mx6sl_pins.h board/freescale/mx6sabresd/mx6sabresd.c board/freescale/mx6slevk/mx6slevk.c drivers/video/Makefile include/configs/mx6sabresd.h include/configs/mx6slevk.h include/lcd.h drivers/video/Makefile
* MLK-10774-2 HDMI: splash screen function enhancementPeng Fan2015-04-29-10/+10
| | | | | | | | | | | | | | -Change HDMI video mode to VGA. -Add pixel clock fraction part setting in IPU driver, fix video mode timing issue. -Add overflow state clear workaround, fix kernel hang in HDMI driver issue. -Correct IPU clock to 264MHz. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit 45d532a0237f5baf2ec95b4364ec5bc94d312689) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-04-13-1/+530
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| * ARM: mx5: add support for USB armory boardAndrej Rosano2015-04-09-0/+530
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Inverse Path USB armory board, an open source flash-drive sized computer based on Freescale i.MX53 SoC. http://inversepath.com/usbarmory Signed-off-by: Andrej Rosano <andrej@inversepath.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Chris Kuethe <chris.kuethe@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Vagrant Cascadian <vagrant@debian.org> Tested-By: Vagrant Cascadian <vagrant@debian.org> Tested-by: Chris Kuethe <chris.kuethe@gmail.com>
| * mx53loco: Disable printing cpuinfoFabio Estevam2015-04-08-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 32df39c741788e ("mx5: fix get_reset_cause") we have the following boot messages on a mx53qsb: U-Boot 2015.04-rc5-00029-gd68df02 (Apr 06 2015 - 11:15:39) CPU: Freescale i.MX53 rev2.1 at 800 MHz Reset cause: POR Board: MX53 LOCO I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial CPU: Freescale i.MX53 rev2.1 at 1000 MHz Reset cause: unknown reset Net: FEC [PRIME] The CPU and Reset cause lines appear twice. Initially mx53 boots at 800MHz, then at a later point the PMIC is configured via I2C to raise the CPU voltage so that it can run at 1GHz. To avoid such misleading double printings, disable printing cpu info for now. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
* | ARM: rpi: add a couple more revision IDsStephen Warren2015-04-13-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | According to Gordon Henderson's WiringPi library, there are some more Pi revision IDs out there. Add support for them. http://git.drogon.net/?p=wiringPi;a=blob_plain;f=wiringPi/wiringPi.c;hb=5edd177112c99416f68ba3e8c6c4db6ed942e796 At least ID 0x13 is out in the wild: Reported-by: Chee-Yang Chau <cychau@gmail.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | Merge git://git.denx.de/u-boot-arcTom Rini2015-04-10-0/+37
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| * | board: axs10x - support v3 mother-boardAlexey Brodkin2015-04-09-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There're 2 versions of motherboards that could be used in ARC SDP. The only important difference for U-Boot is different NAND IC in use: [1] v2 board (we used to support up until now) sports MT29F4G08ABADAWP while [2] v3 board sports MT29F4G16ABADAWP They are almost the same except data bus width 8-bit in [1] and 16-bit in [2]. And for proper support of 16-bit data bus we have to pass NAND_BUSWIDTH_16 option to NAND driver core - which we do now knowing board type we're running on. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2015-04-10-0/+647
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| * | | lpc32xx: add support for board work_92105Albert ARIBAUD \(3ADEV\)2015-04-10-0/+647
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Work_92105 from Work Microwave is an LPC3250- based board with the following features: - 64MB or 128MB SDR DRAM - 1 GB SLC NAND, managed through MLC controller. - Ethernet - Ethernet + PHY SMSC8710 - I2C: - EEPROM (24M01-compatible) - RTC (DS1374-compatible) - Temperature sensor (DS620) - DACs (2 x MAX518) - SPI (through SSP interface) - Port expander MAX6957 - LCD display (HD44780-compatible), controlled through the port expander and DACs This board has SPL support, and uses the LPC32XX boot image format. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* | | odroid-XU3: update board maintainerPrzemyslaw Marczak2015-04-09-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | At present Hyungwon can't take care of this board in U-Boot, so I will keep it working. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Hyungwon Hwang <human.hwang@samsung.com>
* | | mcx: update maintainer and convert to generic boardAnatolij Gustschin2015-04-09-1/+1
|/ / | | | | | | | | | | | | | | Remove obsolete email address from MAINTAINERS. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tom Rini <trini@konsulko.com>
* | ARM: zynq: Remove Jagan from list of maintainersMichal Simek2015-04-08-1/+0
| | | | | | | | | | | | Email address is not longer valid that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.1 at 2024-11-18 20:41:10 +0000