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* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-03-29-28/+112
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| * armv8/ls2080ardb: Enable VID supportRai Harninder2016-03-29-1/+23
| | | | | | | | | | | | | | | | This patch enable VID support for ls2080ardb platform. It uses the common VID driver. Signed-off-by: Rai Harninder <harninder.rai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * SECURE BOOT: Change fsl_secboot_validate func to pass image addrSaksham Jain2016-03-29-12/+26
| | | | | | | | | | | | | | | | | | Use a pointer to pass image address to fsl_secboot_validate(), instead of using environmental variable "img_addr". Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * SECURE BOOT: Halt execution when secure boot failSaksham Jain2016-03-29-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | In case of fatal failure during secure boot execution (e.g. header not found), reset is asserted to stop execution. If the RESET_REQ is not tied to HRESET, this allows the execution to continue. Add esbh_halt() after the reset to make sure execution stops. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080rdb: ls2080qds: Add secure boot supportSaksham Jain2016-03-29-2/+20
| | | | | | | | | | | | | | | | | | | | Sec_init has been called at the beginning to initialize SEC Block (CAAM) which is used by secure boot validation later for both ls2080a qds and rdb. 64-bit address in ESBC Header has been enabled. Secure boot defconfigs are created for boards (NOR boot). Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-lsch3: Add new header for secure bootSaksham Jain2016-03-29-5/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For secure boot, a header is used to identify key table, signature and image address. A new header structure is added for lsch3. Currently key extension (IE) feature is not supported. Single key feature is not supported. Keys must be in table format. Hence, SRK (key table) must be present. Max key number has increase from 4 to 8. The 8th key is irrevocable. A new barker Code is used. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080a: Update fdt path for fsl-mc nodeStuart Yoder2016-03-24-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | The fsl-mc node has been moved under /soc, so update the path references accordingly. Backwards compatibility is retained for /fsl-mc. Delete backwards compatibility for the completely obsolete /fsl,dprc@0. Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | zipitz2: enable cachesVasily Khoruzhick2016-03-27-4/+0
| | | | | | | | | | | | | | It speeds up loading kernel from SD or USB a lot. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
* | zipitz2: enable USB host supportVasily Khoruzhick2016-03-27-0/+21
| | | | | | | | Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
* | zipitz2: restore board supportVasily Khoruzhick2016-03-27-0/+225
| | | | | | | | | | | | zipitz2 was dropped in 49d8899ba9c26335e4a12e01c18028fc5e40c796 Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
* | board: ti: am57xx: Set ethernet MAC addresses from EEPROM to envRoger Quadros2016-03-27-0/+53
| | | | | | | | | | | | | | | | | | | | The MAC addresses for the PRU Ethernet ports will be available in the board EEPROM as an address range. Populate those MAC addresses (if valid) into the u-boot environment so that they can be passed on to the device tree during fdt_fixup_ethernet(). Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: bcm283x: don't always define CONFIG_BCM2835Stephen Warren2016-03-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, CONFIG_BCM2835 is defined for all BCM283x builds and _BCM2836 is defined when building for that SoC. That means there isn't a single define that means "exactly BCM2835". This will complicate future patches where BCM2835-vs-anything-else needs to be determined simply. Modify the code to define one or the other of CONFIG_BCM2835/BCM2836 so future patches are simpler. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | board: ti: DRA7: Add DRA72-rev C evm pinmuxNishanth Menon2016-03-27-36/+110
| | | | | | | | | | | | | | | | | | | | | | | | Add the pinmux data for rev C evm. This is different from previous revisions of the platform thanks to the deltas introduced both from silicon side and from SoC side. Based on J6EcoES2_EVM_Base_Config-20160309b and PCT-DRA72x-v1.3.0.7 for SR2.0 silicon. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | board: ti: DRA72: revC evm: Update sdram timing configuration for SR2.0Ravi Babu2016-03-27-4/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DDR configuration has changes from SR1.1 based Rev-A/B version of evm to the SR2.0 based Rev C of the EVM. Rev C evm now uses the higher density MT41K512M8RH-125-AAT:E (IT) which is of size 2GB. Update the DDR configuration based on data from EMIF configuration tool 1.1.1. NOTE: we use eeprom information (ram_size) to update the configuration. Tested-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by: Ravi Babu <ravibabu@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-03-25-16/+205
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| * | arm: mvebu: db-88f6820: Drop obsolete binary.0 placeholderAndreas Färber2016-03-24-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It has been superseded in kwbimage.cfg in favor of an SPL in commit 9e30b31d20f0b793465d07f056b3d9885f578c0d (arm: mvebu: db-88f6820: Add SPL support with DDR init code). Found via code review. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: theadorable: Add StratixV FPGA programming supportStefan Roese2016-03-24-0/+205
| |/ | | | | | | | | | | | | | | | | | | This patch adds support for Altera StratixV bitstream programming. 2 FPGAs are connected to the SPI busses. This patch uses board specific write code to program the bitstream via SPI direct write mode. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Signed-off-by: Stefan Roese <sr@denx.de>
* | sunxi: Select CONFIG_OF_BOARD_SETUP from arch/arm/KconfigHans de Goede2016-03-23-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Always select OF_BOARD_SETUP on sunxi, rather then having it in almost all our defconfigs. This also fixes it missing from some recently added defconfigs. This commit also modifies our ft_board_setup() to not cause warnings when CONFIG_VIDEO_DT_SIMPLEFB is not set, since we will now always build it. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: Turn satapwr on from board_initHans de Goede2016-03-23-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are 2 reasons for doing this: 1) The main reason for doing this is to move it outside of board/sunxi/ahci.c, so that it can be used on boards which use a usb<->sata chip too; 2) While doing this I realized that doing it from board_init also meant doing it much earlier. Some printf get_timer(0) calls show that the time between board_init() and scsi_init() is more then 600 ms, so we can drop the mdelay(500) While at it also drop the printf("SUNXI SCSI INIT\n") AHCI init is noisy enough by itself. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: Fix gmac not working due to cpu_eth_init no longer being calledHans de Goede2016-03-23-13/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpu_eth_init is no longer called for dm enabled eth drivers, this was causing the sunxi gmac eth controller to no longer work in u-boot. This commit fixes this by calling the clock, reset and pinmux setup function from s_init() and enabling the phy power pin (if any) from board_init(). The enabling of phy power cannot be done from s_init because it uses dm and dm is not ready yet at this point. Note that the mdelay is dropped as the phy gets enabled much earlier now, so it is no longer needed. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Tested-by: Karsten Merker <merker@debian.org> Tested-by: Michael Haas <haas@computerlinguist.org>
* | sunxi: Add support for USB vbus pin for USB3Hans de Goede2016-03-23-0/+6
| | | | | | | | | | | | | | The H3 has USB0 - USB3, add support for having a USB vbus pin for USB3. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: Add defconfig and dts for Orange Pi 2 SBCHans de Goede2016-03-23-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot, 4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI, a TRRS headphone jack for stereo out and composite out, a microphone, an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header and a 40-pin GPIO header. The added dts file is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: Add defconfig and dts for Dserve DSRV9703C tabletHans de Goede2016-03-23-0/+1
| | | | | | | | | | | | | | | | | | The Dserve DSRV9703C is a 9.7" A10 tablet with a 1024x768 ips LCD, 1G RAM, 4GB flash, a Focaltech FT5406EE8 touchscreen and rtl8188ctv wifi. The dts file is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | sunxi: Add defconfig for yones toptech bs1078-v2 tabletPeter Korsgaard2016-03-23-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The yones toptech bs1078-v2 is a 10.1" tablet without any clear markings on the outside, but 'YONESTOPTECH-BS1078' written on the PCB silkscreen. It features a 16:9 1024:600 LCD, A31s SoC, 1GB RAM, 8G NAND, silead gsl3675 touchscreen and a RTL8723AS wifi chip: https://linux-sunxi.org/Yones_Toptech_BS1078_V2 Signed-off-by: Peter Korsgaard <peter@korsgaard.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | sunxi: Add defconfig for Sinlinx SinA31sChen-Yu Tsai2016-03-23-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Sinlinx A31s SDK is a A31s based module/baseboard development kit. The core module has the SoC, PMIC, DRAM, eMMC and supporting components. There are also pads for UART0, JTAG and I2S. The baseboard has 100 Mbps Ethernet, 5x USB 2.0 host ports via a USB 2.0 hub chip, MMC, HDMI, SPDIF, CIR, audio jacks, 2 tablet-like volume buttons, RS232 style UART and USB OTG (though VBUS is not connected). Various headers are available for other addon modules, such as SDIO WiFi, LCD display, camera sensor, UARTs, I2C, SPI and GPIOs. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | sunxi: Add defconfig for icnova-a20-swacStefan Roese2016-03-23-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ICnova-A20-SWAC is a baseboard, equipped with the ICnova-A20 SoM from In-Circuit: http://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM http://linux-sunxi.org/In-Circuit_ICnova_A20 This patch adds support for this board, including ethernet, LCD and USB support. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | sun7i: Add defconfig for the Itead IboxMarcus Cooper2016-03-23-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add defconfig for the multi board device based on the Allwinner A20 SoC. It contains the A20 Itead Core module and a base board for the external interfaces. The core module comes with 4GB NAND and 1GB DDR RAM. The base board to which the core board is connected provides 3 USB 2.0 Host ports, 1 USB 2.0 OTG, 1 uSD slot, 10/100 Ethernet port, HDMI, IR receiver, SPDIF and a 32-pin GPIO header. This header expands the features of core board by exposing the VGA pins, audio In/Out pins, SATA, SPI, I2C, UARTS, USB-OTG and power.. Signed-off-by: Marcus Cooper <codekipper@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | sunxi: Add defconfig for Cubietruck PlusChen-Yu Tsai2016-03-23-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cubietruck Plus is a A83T/H8 based development board. The board has standard DDR3 SDRAM, AXP818 PMIC/codec, SD/MMC, eMMC, USB 2.0 host via HSIC USB Hub, USB OTG, SATA via USB bridge, gigabit ethernet, WiFi, headphone out / mic in, and various GPIO headers. The board also has an EEPROM on i2c0 which holds the MAC address. DLDO3 and DLDO4 provide power to the EMAC pins and PHY. Pin PA20 is connected to the reset control of the PHY. EMAC is not actually supported yet. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | sunxi: Add defconfig and dts for the Polaroid MID2809PXE4 tabletHans de Goede2016-03-23-0/+1
| | | | | | | | | | | | | | | | | | | | | | The Polaroid MID2809PXE4 is a 9" tablet which is clearly marked Polaroid MID2809PXE4 on the back. It features a 9" 16:9 800x480 LCD, A23 Soc, 1GB RAM, 8GB NAND, gsl3670 touchscreen and esp8089 wifi. The dts file is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: Add defconfig and dts for Difrence DIT4350 tabletHans de Goede2016-03-23-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The Difrnce dit4350 tablet is a tiny tablet with a 4.3" 16:9 480x272 LCD, A13 SoC, 512M RAM, 4G NAND, solomon systech ssd2532qn6 touchscreen at i2c1 address 0x48, Memsic MXC622X accelerometer at i2c1 address 0x15 and rtl8188etv wifi. The dts file is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: Add defconfig and dts for colorfly e708 q1 tabletHans de Goede2016-03-23-0/+1
|/ | | | | | | | | | | | | | The colorfly e708 q1 is a 7" tablet which is clearly marked as colorfly e708 q1 on the back. It features a 9:16 800x1280 IPS LCD, A31s SoC, 1GB RAM, 8G NAND, ilitek 2139qt004 touchscreen on i2c-1 addr 0x41, stk8313 accelerometer on i2c-2 addr 0x22 and a rtl8188etv wifi chip. The added dts is identical to the dts submitted to the upstream kernel, note this commit also syncs axp22x.dtsi and sun6i-a31.dtsi with the upstream kernel as the added dts depends on these. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* Fix spelling of "transferred".Vagrant Cascadian2016-03-22-4/+4
| | | | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Fix spelling of "supported/unsupported".Vagrant Cascadian2016-03-22-1/+1
| | | | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
* serial: pl01x: Add support for devices with the rate pre-configured.Eric Anholt2016-03-22-1/+1
| | | | | | | | | | | | | For Raspberry Pi, we had the input clock rate to the pl011 fixed in the rpi.c file, but it may be changed by firmware due to user changes to config.txt. Since the firmware always sets up the uart (default 115200 output unless the user changes it), we can just skip our own uart init to simplify the boot process and more reliably get serial output. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
* ti: k2g: increase phy autoneg timeoutVitaly Andrianov2016-03-22-1/+1
| | | | | | | | After power cycle of a K2G EVM dhcp fails due to a auto-negotiation timeout. This commit increases the timeout to fix the issue. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-03-22-69/+17
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| * armv8/ls1043aqds: Return i2c mux to default chennelWenbin Song2016-03-21-2/+4
| | | | | | | | | | | | | | Return i2c mux to the default channel after accessing retimer. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * freescale: vid: Return i2c mux to default channelWenbin Song2016-03-21-3/+9
| | | | | | | | | | | | | | | | IR chip is on one of the channels on multiplexed I2C-bus. Reset to default channel after accessing. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2085a: Remove phy configuration from QDS and RDBPrabhakar Kushwaha2016-03-21-64/+0
| | | | | | | | | | | | | | | | | | As phy_connect and phy_config are being called from DPAA2 driver. Remove calling of mentioned function from board file. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb: invert irq pins polarity for AQR405 PHYShaohui Xie2016-03-21-0/+4
| | | | | | | | | | | | | | | | | | To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins polarity by setting IRQCR register, because AQR405 interrupt is low active but GIC accepts high active. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | strider: Add DP501 support for cpu modelDirk Eibach2016-03-21-26/+59
|/ | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* x86: Add congatec conga-QA3/E3845-4G (Bay Trail) supportStefan Roese2016-03-17-0/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the congatec conga-QA3/E3845-4G eMMC8 SoM, installed on the congatec Qseven 2.0 evaluation carrier board (conga-QEVAL). Its port is very similar to the MinnowboardMAX port and also uses the Intel FSP as described in doc/README.x86. Currently supported are the following interfaces / devices: - UART (via Winbond legacy SuperIO chip on carrier board) - Ethernet (PCIe Intel I210 / E1000) - SPI including SPI NOR as boot-device - USB 2.0 - SATA via U-Boot SCSI IF - eMMC - Video (HDMI output @ 800x600) - PCIe Not supported yet is: - I2C - USB 3.0 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add support for the samus chromebookSimon Glass2016-03-17-0/+84
| | | | | | | | | | | | | | | | | | | | | | | This adds basic support for chromebook_samus. This is the 2015 Pixel and is based on an Intel broadwell platform. Supported so far are: - Serial - SPI flash - SDRAM init (with MRC cache) - SATA - Video (on the internal LCD panel) - Keyboard Various less-visible drivers are provided to make the above work (e.g. PCH, power control and LPC). The platform requires various binary blobs which are documented in the README. The major missing feature is USB3 since the existing U-Boot support does not work correctly with Intel XHCI controllers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Drop all the old pin configuration codeSimon Glass2016-03-17-180/+0
| | | | | | | | We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Move common LPC code to its own placeSimon Glass2016-03-17-0/+1
| | | | | | | | Some of the LPC code is common to several Intel LPC devices. Move it into a common location. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* mvebu: ds414: Move cmd_syno into ds414 directoryTom Rini2016-03-16-8/+4
| | | | | | | | | | | When we switch to including all linker lists in SPL it is important to not include commands as that may lead to link errors due to other things we have already discarded. In this case as we don't have other common code nor other Synology borads, move the cmd_syno.c file (which claims to be ds414 specific anyways!) into the ds414 directory and only build it for non-SPL builds. Signed-off-by: Tom Rini <trini@konsulko.com>
* lpc32xx: work_92105: Rework MakefileTom Rini2016-03-16-3/+5
| | | | | | | | | | When we switch to including all linker lists in SPL it is important to not include commands as that may lead to link errors due to other things we have already discarded. In this case change things so that we only build the right objects for SPL or non-SPL Cc: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> Signed-off-by: Tom Rini <trini@konsulko.com>
* efi_loader: Add runtime servicesAlexander Graf2016-03-15-0/+30
| | | | | | | | | | | | | | | | | After booting has finished, EFI allows firmware to still interact with the OS using the "runtime services". These callbacks live in a separate address space, since they are available long after U-Boot has been overwritten by the OS. This patch adds enough framework for arbitrary code inside of U-Boot to become a runtime service with the right section attributes set. For now, we don't make use of it yet though. We could maybe in the future map U-boot environment variables to EFI variables here. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* hikey: Add MMU tablesAlexander Graf2016-03-15-0/+21
| | | | | | | | The hikey runs with dcache disabled today. There really should be no reason not to use caches on AArch64, so let's add MMU definitions and enable the dcache. Signed-off-by: Alexander Graf <agraf@suse.de>
* vexpress64: Add MMU tablesAlexander Graf2016-03-15-0/+21
| | | | | | | | There's no good excuse for running with caches disabled on AArch64, so let's just move the vexpress64 target to enable the MMU and run with caches on. Signed-off-by: Alexander Graf <agraf@suse.de>
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