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* x86: ivybridge: Do not require HAVE_INTEL_MEBin Meng2016-01-13-0/+1
* x86: Remove HAVE_ACPI_RESUMEBin Meng2015-12-09-1/+0
* x86: Remove CPU_INTEL_SOCKET_RPGA989Bin Meng2015-12-09-1/+0
* x86: Clean up ivybridge/chrome Kconfig optionsBin Meng2015-12-09-1/+0
* x86: Remove MARK_GRAPHICS_MEM_WRCOMBBin Meng2015-07-14-1/+0
* x86: Kconfig: Remove deprecated CONFIG_SYS_EXTRA_OPTIONSBin Meng2015-04-29-0/+3
* x86: cros_ec: Drop unnecessary initSimon Glass2015-04-18-3/+0
* dm: x86: pci: Convert coreboot to use driver model for pciSimon Glass2015-04-18-0/+9
* x86: Rename MMCONF_BASE_ADDRESS and make it common across x86Simon Glass2015-02-05-2/+1
* x86: Move CONFIG_SYS_CAR_xxx to KconfigBin Meng2015-01-13-0/+8
* x86: Move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to KconfigBin Meng2015-01-13-0/+1
* x86: ich6-gpio: Add Intel Tunnel Creek GPIO supportBin Meng2014-12-18-1/+1
* x86: ich6-gpio: Move setup_pch_gpios() to board support codesBin Meng2014-12-13-0/+40
* x86: Make ROM_SIZE configurable in KconfigBin Meng2014-12-13-0/+1
* x86: chromebook_link: Enable the Chrome OS ECSimon Glass2014-11-25-0/+4
* x86: Remove board_early_init_r()Simon Glass2014-11-25-5/+0
* x86: chromebook_link: Enable GPIO supportSimon Glass2014-11-21-0/+107
* x86: chromebook_link: Implement CAR support (cache as RAM)Simon Glass2014-11-21-0/+12
* x86: Emit post codes in startup code for ChromebooksSimon Glass2014-11-21-0/+4
* x86: Add chromebook_link boardSimon Glass2014-11-21-0/+53
generated by cgit v1.1 at 2024-11-15 13:06:24 +0000