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path: root/board/freescale/p1_p2_rdb/ddr.c
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* board/p1_p2_rdb:Enable p1_p2_rdb boot from NAND/SD/SPI in SPLPrabhakar Kushwaha2014-05-16-11/+5
* Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun2013-11-25-1/+1
* powerpc/mpc8xxx: Add memory reset controlYork Sun2013-08-09-1/+1
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
* ppc: Move lbc_clk and cpu to arch_global_dataSimon Glass2013-02-04-1/+1
* powerpc/mpc85xx: Ignore E bit for SVR_SOC_VER()York Sun2012-07-06-4/+2
* powerpc/85xx: Optimized DDR settings for 800MT/s on P1/P2 RDBPoonam Aggrwal2011-04-04-2/+2
* powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdbPriyanka Jain2011-04-04-4/+11
* powerpc/85xx: Declare fsl_ddr_set_memctl_regs in <asm/fsl_ddr_sdram.h>Kumar Gala2011-04-04-3/+0
* powerpc/85xx: Remove DATARATE_*_MHZ defines in static ddr initKumar Gala2011-04-04-14/+11
* mpc85xx boards: initdram() cleanup/bugfixBecky Bruce2011-01-14-14/+1
* 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHzPoonam Aggrwal2010-06-29-1/+1
* 85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data ratePoonam Aggrwal2009-10-27-2/+2
* 85xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB.Poonam Aggrwal2009-10-27-8/+8
* ppc/85xx: 32bit DDR changes for P1020/P1011Poonam Aggrwal2009-09-24-5/+24
* ppc/8xxx: Remove ddr_pd_cntl register since it doesn't existKumar Gala2009-09-08-5/+0
* 85xx: Add support for P2020RDB boardPoonam Aggrwal2009-08-28-0/+243
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