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path: root/board/freescale/p1_p2_rdb/ddr.c
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* mpc85xx boards: initdram() cleanup/bugfixBecky Bruce2011-01-14-14/+1
* 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHzPoonam Aggrwal2010-06-29-1/+1
* 85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data ratePoonam Aggrwal2009-10-27-2/+2
* 85xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB.Poonam Aggrwal2009-10-27-8/+8
* ppc/85xx: 32bit DDR changes for P1020/P1011Poonam Aggrwal2009-09-24-5/+24
* ppc/8xxx: Remove ddr_pd_cntl register since it doesn't existKumar Gala2009-09-08-5/+0
* 85xx: Add support for P2020RDB boardPoonam Aggrwal2009-08-28-0/+243