arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale.	Kumar Gala	2007-12-11	-263/+0
\| \| \| \| \| \|	Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
*	Use standard LAWAR_TRGT_IF_* defines for LAW setup on 85xx	Kumar Gala	2007-12-11	-16/+9
\| \| \| \| \| \| \| \|	We already had defines for LAWAR_TRGT_IF_* that we should use rather than creating new ones. Also, added some missing defines for PCIE targets. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
*	8548cds PCIE support.	Ed Swarthout	2007-08-14	-80/+82
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Make the early L1 cache stack region guarded to prevent speculative fetches outside the locked range. Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions. init.S whitespace cleanup. Allow TEXT_BASE value to be specified on command line. This allows it to be set to 0xfffc0000 which cuts the uboot binary in half. Clear and enable lbc and ecm errors. Update last_busno in device-tree for pci and pcie. Remove load of obsolete cpu/mpc85xx/pci.0 Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
*	Cleaned up some 85xx PCI bugs	Andy Fleming	2007-05-02	-1/+1
\| \| \| \| \| \| \| \| \| \| \|	* Cleaned up the CDS PCI Config Tables and added NULL entries to the end * Fixed PCIe LAWBAR assignemt to use the cpu-relative address * Fixed 85xx PCI code to assign powar region sizes based on the config values (rather than hard-coding them) * Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address Signed-off-by: Andy Fleming <afleming@freescale.com>
*	Changed BOOKE_PAGESZ_nGB to BOOKE_PAGESZ_nG	Andy Fleming	2007-04-23	-1/+1
\| \| \| \| \| \| \|	The other pagesz constants use one letter to specify order of magnitude. Also change the one reference to it in mpc8548cds/init.S Signed-off-by: Andy Fleming <afleming@freescale.com>
*	u-boot: Enable PCI function and add PEX & rapidio memory map on MPC8548CDS board	Zang Roy-r61911	2007-04-23	-32/+45
\| \| \| \| \| \|	Enable PCI function and add PEX & rapidio memory map on MPC8548CDS board. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
*	* Added VIA configuration table	Matthew McClintock	2006-06-28	-6/+6
\| \| \| \| \| \| \|	* Added support for PCI2 on CDS Patch by Andy Fleming 17-Mar-2006 Signed-off-by: Andy Fleming <afleming@freescale.com>
*	* Patch by Jon Loeliger, 2005-05-05	Jon Loeliger	2005-07-25	-0/+255
	Implemented support for MPC8548CDS board. Added DDR II support based on SPD values for MPC85xx boards. This roll-up patch also includes bugfies for the previously published patches: DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O