| Commit message (Collapse) | Author | Age | Lines |
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Enable pcie support in uboot on imx6sx sd boards
- enable_pcie_clock should be call before ssp_en is set,
since that ssp_en control the phy_ref clk gate, turn on
it after the source of the pcie clks are stable.
- add debug info
- add rx_eq of gpr12 on imx6sx
- there are random link down issue on imx6sx. It's
pcie ep reset issue.
solution:reset ep, then retry link can fix it.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Add new function "arch_auxiliary_core_check_up" to check whether M4
is already up. Therefore, avoid starting M4 again when it is running.
Signed-off-by: Ye.Li <B37916@freescale.com>
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The kernel may break the display pipeline at boot stage and
introduce various display artifacts, so let's disable mxsfb
in uboot when necessary.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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DIV_SELECT is used as Fout = Fin * div_select / 2.0, so we should do
the shift after the multiply to avoid rounding errors
Signed-off-by: Andre Renaud <andre@bluewatersys.com>
(cherry picked from commit 2eb268f6fd236a5ad9d51e7e47190d7994b3920f)
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Commit 3d622b78 (mx6: soc: Introduce set_ldo_voltage()) introduces
set_ldo_voltage() function that can be used to set the voltages
of any of the three LDO regulators controlled by the PMU_REG_CORE register.
Prior to this commit there was a single set_vddsoc() which only configured the
VDDSOC regulator.
Update the comments to align with the new set_ldo_voltage() implementation.
Acked-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
(cherry picked from commit 157f45da91b306d71dbf3a51325352dc11bf16d1)
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When gis enable in uboot, the CSI0 input mux select setting
to vadc module, clean the bit when gis disabled.
Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit ae66b17b7da3be50dc81ca636b67e8e879f52e26)
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The android boot needs get_board_serial function to get the
CPU uid as the serial number. Implement this function to read
the uid from fuse for all iMX6 platforms.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Since the iMX6SL does not have PCIE module, should not define the
function "imx_set_pcie_phy_power_down" for it. Otherwise, get the
build warning below:
arch/arm/cpu/armv7/mx6/soc.c:446:13: warning: 'imx_set_pcie_phy_power_down'
defined but not used [-Wunused-function]
static void imx_set_pcie_phy_power_down(void)
Signed-off-by: Ye.Li <B37916@freescale.com>
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imx6sl doesn't have the pcie module, mask the pcie
related codes from imx6sl.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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There are about 0.02% percentage on some imx6q/dl/solo
hw boards, random pcie link down when warm-reset is used.
Make sure to clear the ref_ssp_en bit16 of gpr1 before
warm-rst, and set ref_ssp_en after the pcie clks are
stable to workaround it.
rootcause:
* gpr regisers wouldn't be reset by warm-rst, while the
ref_ssp_en is required to be reset by pcie.
(work-around in u-boot)
* ref_ssp_en should be set after pcie clks are stable.
(work-around in kernel)
Signed-off-by: Richard Zhu <r65037@freescale.com>
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When enabling "CONFIG_SECURE_BOOT", the build broken on iMX6SX platform
due to two problems.
1. The imximage tool in v2014 changes the command name of "SECURE_BOOT"
to "CSF". Must update it in imximage.cfg scripts.
2. The iMX6SX uses "CONFIG_ROM_UNIFIED_SECTIONS", but some HAB API
definitions are not defined and cause compile errors.
(HAB_RVT_REPORT_EVENT_NEW, HAB_RVT_REPORT_STATUS_NEW,
HAB_RVT_AUTHENTICATE_IMAGE_NEW, HAB_RVT_ENTRY_NEW, HAB_RVT_EXIT_NEW)
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add gis module, current gis is support vadc input.
Add power down function to lcdif driver.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add vadc power up/down function.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add vadc clock enable function.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add registers and clock functions to enable/set LCDIF clock and LVDS.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add a new interface "mxs_lcd_panel_setup" to setup fb parameters and
specifies the LCDIF controller for multiple controllers of iMX6SX.
Pass fb parameters via "videomode" env remains work if the new interface
is not called before video initialization.
Modify LCDIF clock interface "mxs_set_lcdclk" to support multiple
LCDIF controllers on iMX6SX.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add the definitions for the RDC mappings on iMX6SX and include this
file to "imx-rdc.h"
Signed-off-by: Ye.Li <B37916@freescale.com>
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The RDC driver provides interfaces for setting peripherals and masters
at BSP initialization, before using the peripherals driver. Another
interfaces for lock/unlock RDC semaphore and permission check.
The driver assumes boot CPU which runs u-boot is in Domain 0
(default setting on boot). Users should not set it to other domains.
The peripherals ID and masters ID may change on different chip, each
should provide definitions of the IDs and be included in "imx-rdc.h".
Signed-off-by: Ye.Li <B37916@freescale.com>
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Implement the override function "arch_auxiliary_core_up" to boot
Cortex-M4 by executing command "bootaux".
The parameter "boot_private_data" points to fields where stores
the stack address and PC address for M4 to run.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Debug monitor will print out last failed AXI access info when
system reboot is caused by AXI access failure, only works when
debug monitor is enabled.
Enable this module on i.MX6SX.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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iMX6SX has different enet system clocks with iMX6SL, and has two ENET
controllers. So update clocks and soc APIs accordingly to support this
features.
1. Modify the clock API "enable_enet_clock" to enable enet system clock
for enet controllers.
2. Enet RGMII TX clock source may come from external or internal PLL.
By default, use the external phy CLK_25M output as TX clock source.
When using internal PLL as source, the function enable_fec_anatop_clock
must be called to enable clock for each enet controller.
3. Modify the MAC address function "imx_get_mac_from_fuse" to get either
ENET MAC address.
4. Add configuration "CONFIG_FEC_MXC_25M_REF_CLK" to enable ENET 25Mhz
reference clock.
5. Modify imx6slevk BSP to fit the new APIs.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Enable the clock for QuadSPI controllers. Must be called at
initialization.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Adding clks, pinmux, memory map, etc for iMX6SoloX.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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To be compatible with more USB otg lines which has micro port B to
connect imx6 OTG port when imx6 working at host mode, remove the
checking for the OTG ID with the init type. Only use the init type
for the power and controller initialization.
Use same EHCI register base address for various imx6 platform.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Should use the address of one register when calling "readl"/"writel".
Signed-off-by: Ye.Li <B37916@freescale.com>
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The Latency parameters of PL310 Tag RAM latency control register and
Data RAM Latency control register are set in L2 cache enable.
Setting these registers must have PL310 not enabled. But when using
Plugin mode boot, the PL310 is enabled by bootrom. Thus, disable
the PL310 before this setting.
Signed-off-by: Ye.Li <B37916@freescale.com>
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shutdown vddpu and pcie phy to save power
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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-Change HDMI video mode to VGA.
-Add pixel clock fraction part setting in IPU driver,
fix video mode timing issue.
-Add overflow state clear workaround,
fix kernel hang in HDMI driver issue.
-Correct IPU clock to 264MHz.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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Add BSP codes to support SPI NOR flash read, write and erase by using
"sf" command.
In addition, add a new configuration "mx6slevk_spinor" for building
the uboot that can be booted from SPI NOR flash and stored the
environments variables in it.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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Enable the USB EHCI for the imx6slevk board. Add VBUS control
pin settings and related BSP codes.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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- Add i2c0 support for imx6sl evk platform.
- Read pmic device ID and revsion ID.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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imx6 boards (sabresd, sabreauto, arm2 and slevk) have multiple SD/MMC ports to boot.
But current uboot hard code the SD/MMC port for environment variables storage. So
if customer changes a port without modifying the configuration "CONFIG_SYS_MMC_ENV_DEV",
error will issue at saving and loading environment.
Implement a mechanism to detect SD/MMC port from SRC SMBR register, and override the
default "mmc_get_env_devno". The "board_late_mmc_env_init" is used to set "mmcdev"
when booting from SD/MMC port. Finally after booting from SD/MMC, the environment storage
device and "mmcdev" are both set to current SD/MMC port. Customers don't need to re-build
the image if booting from different SD/MMC port.
This patch also adds SD1 and SD3 support to imx6slevk BSP, and adds support for sabreauto
SD1 slot on base board.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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Support android features:
fastboot, booti command and recovery for sabresd SD, sabresd eMMC,
sabreauto SD, sabreauto NAND.
For all booting media (SD, eMMC, NAND), inherits the partitions layout
from v2009.08. Fastboot will detect the booting media to replace
hardcoding fastboot device. SATA is not supported.
FDT is supported to use the "unused" fields in bootimg header which
requires the FDT to be combined into the boot.img.
For non-FDT boot.img, the "unused" fields should left to NULL and is
compatible to boot.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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i.MX6sl evk has keyboards on the board, so add mxc_keyb driver to
support key press checking.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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If boot from usb, reset environment to default value.
Auto apply mfgtools setting and boot mfgtools kernel.
Signed-off-by: Frank Li <Frank.li@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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Add EPDC splash screen feature for MX6SL EVK, and MX6DL SABRESD board.
- Currently, splash screen consists of a simple black border
around a white screen. Done this way to save in memory footprint.
- EPDC splash screen is disabled by default in the config file for MX6DL_SABRESD
and MX6SL_EVK. If left enabled, the U-Boot image will not boot correctly
(hang), since some additional content on the boot device (waveform file) is
required for EPDC splash to work correctly.
Please refer to Linux Reference Manual for how to flash WAVEFORM file.
Signed-off-by: Robby Cai <R63905@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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fastboot
Android fastboot leans on the USB gadget driver to communicate with host. Porting
the imx_udc driver from v2009.08 with two changes: adding resource/memory release
APIs and replacing the uncached memory with cache flush&invalidate operations.
Pins and Clocks initialization are added to support boards:
mx6qdlsabresd, mx6qdlsabreauto, mx6slevk
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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Add check for 1.2GHz core speed. If Speed grading fuse is for 1.2GHz,
enable LDO bypass and setup PMIC voltages. LDO bypass is dependent
on the flatten device tree file.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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Support generating plugin images. Make sure not to effect the size
of DCD images.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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Support HAB authentication of kernel or secondary images via bootm
or hab_auth_img u-boot command.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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Support CPU temperature sensors on i.MX6 SoC.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
include/configs/trats.h
include/configs/trats2.h
include/mmc.h
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1. The Data timeout counter value in eSDHC_SYSCTL register is
not working as it should be, so add quirks to enable this
workaround to fix it to the max value 0xE.
2. Add CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround.
* Update of patch for change mmc interface by
Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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Since Kbuild was introduced, warmboot_avp.o has been compiled
without -march=armv4t.
Makefile should be adjusted to pass a per-file option.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
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Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
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Fix the macros guarding the spl.h header for various platforms. Due to
a typo and a propagation of it, the macros went out-of-sync with their
ifdef check, so fix this.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
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U-Boot has supported two kinds of asm-offsets.h.
One is generic for all architectures and its source is located at
./lib/asm-offsets.c.
The other is SoC specific and its source is under SoC directory.
The problem here is that only boards with SoC directory can use
the asm-offsets infrastructure.
Putting asm-offsets.c right under CPU directory does not work.
Now a new demand is coming. PowerPC folks want to use asm-offsets.
But no PowerPC boards have SoC directory.
It seems inconsistent that some boards add asm-offsets.c to SoC
directoreis and some to CPU directories.
It looks more reasonable to put asm-offsets.c under arch/$(ARCH)/lib.
This commit merges asm-offsets.c under SoC directories into
arch/$(ARCH)/lib/asm-offsets.c.
By the way, I doubt the necessity of some entries in asm-offsets.c.
I am leaving refactoring to the board maintainers.
Please check "TODO" in the comment blocks in
arch/{arm,nds32}/lib/asm-offsets.c.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Yuantian Tang <Yuantian.Tang@freescale.com>
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U-Boot uses the 'mkimage' tool to produce various image types,
not only uImage image type. Rename the invocation name from
UIMAGE to MKIMAGE.
The following command was used to do the replacement:
git grep 'quiet_cmd_mkimage.* = UIMAGE' | cut -d : -f 1 | \
xargs -i sed -i "s@\(quiet_cmd_mkimage\)\(.*\) = UIMAGE @\1\2 = MKIMAGE@" {}
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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The way that struct mmc was implemented was a bit of a mess;
configuration and internal state all jumbled up in a single structure.
On top of that the way initialization is done with mmc_register leads
to a lot of duplicated code in drivers.
Typically the initialization got something like this in every driver.
struct mmc *mmc = malloc(sizeof(struct mmc));
memset(mmc, 0, sizeof(struct mmc);
/* fill in fields of mmc struct */
/* store private data pointer */
mmc_register(mmc);
By using the new mmc_create call one just passes an mmc config struct
and an optional private data pointer like this:
struct mmc = mmc_create(&cfg, priv);
All in tree drivers have been updated to the new form, and expect
mmc_register to go away before long.
Changes since v1:
* Use calloc instead of manually calling memset.
* Mark mmc_register as deprecated.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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This patch add gicv3 support to uboot armv8 platform.
Changes for v2:
- rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S
- move smp_kick_all_cpus() from gic.S to start.S, it would be
implementation dependent.
- Each core initialize it's own ReDistributor instead of master
initializeing all ReDistributors. This is advised by arnab.basu
<arnab.basu@freescale.com>.
Signed-off-by: David Feng <fenghua@phytium.com.cn>
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