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* | OMAP3: Change mem_ok to clear again after reading backTom Rini2011-12-06-0/+1
| | | | | | | | | | | | | | | | It's possible to need to call this function on the same banks multiple times so we want to be sure that 'pos A' is cleared out again at the end. Signed-off-by: Tom Rini <trini@ti.com>
* | OMAP3: Add a helper function to set timings in SDRCTom Rini2011-12-06-55/+61
| | | | | | | | | | | | | | | | Since we go through the sequence to setup the SDRC timings more than once, break this logic out into its own function and have that function call mem_ok() to make sure the memory is usable. Signed-off-by: Tom Rini <trini@ti.com>
* | OMAP3: Update SDRC dram_init to always call make_cs1_contiguous()Tom Rini2011-12-06-12/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | We update the comment in make_cs1_contiguous() to be a little bit more clear (it's been copy/pasted from other silicons) and then explain in dram_init() why we need to always try this. Note that in the previous behavior we were always calling this on boards that never had cs1 populated anyhow so making sure we do this always is fine and will correct things like omap3evm detecting an invalid amount of memory (384MB). Signed-off-by: Tom Rini <trini@ti.com>
* | omap3: mem: Comment enable_gpmc_cs_config moreTom Rini2011-12-06-3/+13
| | | | | | | | | | | | | | Expand the "enable the config" comment to explain what the bit shifts are and define out two of the magic numbers. Signed-off-by: Tom Rini <trini@ti.com>
* | arm: printf() is not available in some SPL configurationsChristian Riesch2011-12-06-0/+2
| | | | | | | | | | | | | | | | | | | | This patch avoids build breakage for SPLs that do not support printf. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Tom Rini <trini@ti.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, davinci: move misc function in arch treeHeiko Schocher2011-12-06-1/+151
| | | | | | | | | | | | | | | | | | | | | | | | move the board/davinci/common/misc.c file to arch/arm/cpu/arm926ejs/davinci/misc.c, so all davinci boards can use this functions. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
* | arm, davinci, da850: add uart1 tx rx pinmux configHeiko Schocher2011-12-06-0/+6
| | | | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Tom Rini <trini@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
* | arm, davinci: move davinci_rtc struct to hardware.hHeiko Schocher2011-12-06-0/+39
| | | | | | | | | | | | | | | | | | move struct davinci_rtc to arch/arm/include/asm/arch-davinci/hardware.h and add RTC_KICK0R_WE, RTC_KICK1R_WE defines, so they are global useable. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci: Remove duplication of pinmux configuration codeChristian Riesch2011-12-06-28/+8
| | | | | | | | | | | | | | | | | | | | This patch replaces the pinmux configuration code in arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c by the code from arch/arm/cpu/arm926ejs/davinci/pinmux.c. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Heiko Schocher <hs@denx.de>
* | arm, da850: Add pinmux configurations to the arch treeChristian Riesch2011-12-06-0/+217
| | | | | | | | | | | | | | | | | | | | | | | | | | Up to now nearly every davinci board has separate code for the definition of pinmux configurations. This patch adds pinmux configurations for the DA850 SoCs to the arch tree which may later be used for all DA850 based boards. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Heiko Schocher <hs@denx.de>
* | arm, davinci: Move pinmux functions from board to arch treeChristian Riesch2011-12-06-1/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Nick Thompson <nick.thompson@ge.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Nick Thompson <nick.thompson@ge.com>
* | arm, arm926ejs: always do cpu critical initsHeiko Schocher2011-12-06-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | always do the cpu critical inits in cpu_init_crit, and only jump to lowlevel_init, if CONFIG_SKIP_LOWLEVEL_INIT is not defined. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Christian Riesch <christian.riesch@omicron.at>
* | AM3517: move AM3517 specific mux defines to generic headerIlya Yanok2011-12-06-0/+41
| | | | | | | | | | | | | | AM3517 specific CONTROL_PADCONF_* defines moved from board-specific files to <asm/arch-omap3/mux.h> Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* | AM35xx: add EMAC supportIlya Yanok2011-12-06-0/+104
| | | | | | | | | | | | AM35xx has DaVinci-compatible EMAC. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* | arm926ejs: add noop implementation for dcache opsIlya Yanok2011-12-06-1/+76
| | | | | | | | | | | | | | | | Added noop implementation for dcache operations that will buzz about missing real implementation and disable the dcache. This fixes compilation of DaVinci EMAC driver on arm926ejs. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* | davinci_emac: move arch-independent defines to separate headerIlya Yanok2011-12-06-289/+4
| | | | | | | | | | | | | | | | | | | | | | DaVinci EMAC is found not only on DaVinci SoCs but on some OMAP3 SoCs also. This patch moves common defines from arch-davinci/emac_defs.h to drivers/net/davinci_emac.h DaVinci specific PHY drivers hacked to include the new header. We might want to switch to phylib in future. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* | omap4: fix IO settingAneesh V2011-12-06-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | The value from TRIM is not working for some 4430 silicons. So, override with hw team recommended value. However, for 4460 TRIM value shall be used as long as the part is trimmed This fixes boot problem on some OMAP4430 ES2.0 Panda boards out there. Cc: Steve Sakoman <sakoman@gmail.com> Signed-off-by: Aneesh V <aneesh@ti.com>
* | omap4460: add ES1.1 identificationAneesh V2011-12-06-1/+12
| | | | | | | | Signed-off-by: Aneesh V <aneesh@ti.com>
* | omap4: emif: fix error in driverAneesh V2011-12-06-2/+2
| | | | | | | | | | | | | | | | | | | | There was a typo in the EMIF driver. It went un-noticed because it affected only when automatic detection is enabled and even then half the memory was configured and identified properly. Reported-by: Rockefeller <rockefeller.lin@innocomm.com> Signed-off-by: Aneesh V <aneesh@ti.com>
* | omap: remove I2C from SPLAneesh V2011-12-06-1/+0
| | | | | | | | | | | | | | Due to some recent changes I2C is no longer required in SPL. Remove the i2c_init() call to save some space Signed-off-by: Aneesh V <aneesh@ti.com>
* | omap4460: fix TPS initializationAneesh V2011-12-06-8/+0
| | | | | | | | | | | | | | | | | | | | | | TPS power IC is controlled using a GPIO (gpio_wk7). This GPIO should be maintained at logic 1 always. As such an internal pull-up on this pin will do the job, driving the GPIO outuput is not needed. This will avoid the need of using GPIO library in SPL and also may save some power. Signed-off-by: Aneesh V <aneesh@ti.com>
* | start.S: remove omap3 specific code from start.SAneesh V2011-12-06-23/+9
| | | | | | | | | | | | | | Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com> Acked-by: Tom Rini <trini@ti.com>
* | armv7: setup vectorAneesh V2011-12-06-0/+17
| | | | | | | | | | | | | | | | The vector is not correctly setup in armv7 except for OMAP3. Correcting this. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com>
* | armv7: include armv7/cpu.c in SPL buildAneesh V2011-12-06-2/+2
| | | | | | | | | | | | | | | | | | This allows SPL to have default implementation of save_boot_params(), useful for SoCs that do not intend to override this default implementation Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com>
* | armv7: disable L2 cache in cleanup_before_linux()Aneesh V2011-12-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We were not disabling external caches before jumping to kernel. We were flushing all caches including external caches and disabling caches globally in CP15 System Control register. Apparently this is not enough. The bootstrap loader in Linux kernel that does decompression enables data-caches again, flush them after use and disable them before jumping to kernel proper. However, it's not aware of the external caches. Since we have left external cache enabled, external cache will get used once caches are enabled globally, but it's not flushed because decompressor is not aware of external caches. When it jumps to kernel with caches disabled globally, we have stale data in the external cache and a coherency problem. This was breaking the boot for OMAP4 with latest mainline kernel. The solution is to disable external caches in cleanup_before_linux(). With this fix kernel is booting again. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com>
* | arm, arm926ejs: Fix clear bss loop for zero length bssChristian Riesch2011-12-06-3/+5
| | | | | | | | | | | | | | | | This patch fixes the clear bss loop for bss sections that have zero length, i.e., where __bss_start == __bss_end__. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | PXA: Rename pxa_dram_init to pxa2xx_dram_initMarek Vasut2011-12-06-3/+3
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* | PXA: Export cpu_is_ and pxa_dram_init functionsMarek Vasut2011-12-06-0/+29
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* | PXA: Replace timer driverMarek Vasut2011-12-06-52/+35
| | | | | | | | | | | | This new timer driver shall conform to new Timer API. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* | PXA: Add cpuinfo display for PXA2xxMarek Vasut2011-12-06-0/+134
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* | PXA: Separate PXA2xx CPU initMarek Vasut2011-12-06-73/+31
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* | PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]XMarek Vasut2011-12-06-44/+44
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* | PXA: Re-add the Dcache locking as RAM for pxa250Marek Vasut2011-12-06-2/+116
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | PXA: Rework start.S to be closer to other ARMsMarek Vasut2011-12-06-247/+153
| | | | | | | | | | | | | | | | | | | | The start.S on PXA was very obscure. This reworks it back to be close to arm1136 start.S and others. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> V2: Don't compile in relocation support if building SPL
* | Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingWolfgang Denk2011-12-05-6/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'agust@denx.de' of git://git.denx.de/u-boot-staging: Makefile: add tools/mkenvimage to target 'clean' mv_common.c: get rid of 'defined but not used' warning m68k: fix ambiguous bit testing sparc: fix unknown escape sequence warnings sparc: fix unused variable warnings sf: fix erase debug output
| * | m68k: fix ambiguous bit testingMike Frysinger2011-12-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building for some m68k boards results in the warning: cpu_init.c: In function 'cpu_init_f': cpu_init.c:287: warning: suggest parentheses around operand of '!' or change '&' to '&&' or '!' to '~' Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | sparc: fix unused variable warningsMike Frysinger2011-12-05-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the build warnings: board.c: In function 'board_init_f': board.c:179:8: warning: unused variable 'e' board.c:178:6: warning: unused variable 'i' board.c:173:13: warning: unused variable 'cmdtp' bootm.c: In function 'do_bootm_linux': bootm.c:101:28: warning: unused variable 'kernend' bootm.c:101:15: warning: unused variable 'initrd_addr' bootm.c:100:26: warning: unused variable 'checksum' bootm.c:100:21: warning: unused variable 'len' bootm.c:100:15: warning: unused variable 'data' Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | sh: Add support Renesas SH7724Nobuhiro Iwamatsu2011-12-02-0/+236
| | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | sh: avoid multiple definition errors with cache funcsMike Frysinger2011-12-02-21/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent builds for SH4 boards fail with a lot of errors like: cmd_mem.o: In function 'dcache_invalid_range': include/asm/cache.h:25: multiple definition of 'dcache_invalid_range' include/asm/cache.h:25: first defined here This is due to the funcs being defined in the header, but not static or inline or extern. So move them to the sh4-specific cache.c file. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | sh: Add ashrsi3 libgcc functionPhil Edworthy2011-12-02-0/+186
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ashrsi3 function is used by some commands that aren't in SH2A default configs (e.g. JFFS2). The ashrsi3.S file has been copied from Linux. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | sh: only add -mno-fdpic if the compiler supports itMike Frysinger2011-12-02-1/+2
|/ / | | | | | | | | | | | | | | | | Not all SuperH toolchains support -mno-fdpic. Chances are good that if the flag doesn't work, it isn't defaulting to the FDPIC ABI, so the flag isn't needed. So only add it if it is actually supported. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arch/powerpc/cpu/mpc86xx/cpu.c: Fix GCC 4.6 build warningWolfgang Denk2011-12-02-3/+0
| | | | | | | | | | | | | | | | | | | | | | Fix: cpu.c: In function 'checkcpu': cpu.c:51:7: warning: variable 'ver' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Kumar Gala <galak@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-12-01-24/+158
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: mpc85xx: support for Freescale COM Express P2020 arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning mpc85xx: support board-specific reset function powerpc/85xx: verify the localbus device tree address before booting the OS mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification powerpc/p3060qds: Add board related support for P3060QDS platform powerpc/85xx: clean up and document the QE/FMAN microcode macros powerpc/85xx: always implement the work-around for Erratum SATA_A001 powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.h powerpc/85xx: Add workaround for erratum A-003474 powerpc/85xx: fixup flexcan device tree clock-frequency powerpc/85xx: Add workaround for erratum CPU-A003999
| * | mpc85xx: support for Freescale COM Express P2020Ira W. Snyder2011-11-29-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the Freescale COM Express P2020 board. This board is similar to the P1_P2_RDB, but has some extra (as well as missing) peripherals. Unlike all other mpc85xx boards, it uses a watchdog timeout to reset. Using the HRESET_REQ register does not work. This board has no NOR flash, and can only be booted via SD or SPI. This procedure is documented in Freescale Document Number AN3659 "Booting from On-Chip ROM (eSDHC or eSPI)." Some alternative documentation is provided in Freescale Document Number P2020RM "P2020 QorIQ Integrated Processor Reference Manual" (section 4.5). Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warningKumar Gala2011-11-29-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix: interactive.c: In function 'fsl_ddr_interactive': interactive.c:1357:15: warning: variable 'len' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc85xx: support board-specific reset functionIra W. Snyder2011-11-29-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is useful for boards which cannot be reset in the usual way for the 85xx CPU. An example is a board which can only be reset by a hardware watchdog. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: verify the localbus device tree address before booting the OSTimur Tabi2011-11-29-9/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The localbus controller node in the device tree is typically a root node, even though the controller is part of CCSR. If we were to put the lbc node under the SOC node, then the 'ranges' property in the lbc node would translate through the 'ranges' property of the parent SOC node, and we don't want that. Since the lbc is a separate node, it's possible for the 'reg' property to be wrong. This happened with the original version of p1022ds.dts, which used a 32-bit value in the 'reg' address, instead of a 36-bit address. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc8xxx: update module_type values from JEDEC DDR3 SPD SpecificationIra W. Snyder2011-11-29-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer JEDEC DDR3 SPD Specifications define several additional values for the DDR3 module_type field which were undefined when this code was written. Update the code to handle the newer module types. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: clean up and document the QE/FMAN microcode macrosTimur Tabi2011-11-29-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several macros are used to identify and locate the microcode binary image that U-boot needs to upload to the QE or Fman. Both the QE and the Fman use the QE Firmware binary format to package their respective microcode data, which is why the same macros are used for both. A given SOC will only have a QE or an Fman, so this is safe. Unfortunately, the current macro definition and usage has inconsistencies. For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address of NAND. There's no way to know by looking at a variable how it's supposed to be used. In the future, the code which uploads QE firmware and Fman firmware will be merged. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: always implement the work-around for Erratum SATA_A001Timur Tabi2011-11-29-4/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the P1022/P1013, the work-around for erratum SATA_A001 was implemented only if U-Boot initializes SATA, but SATA is not initialized by default. So move the work-around to the CPU initialization function, so that it's always executed on the SOCs that need it. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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