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authorAneesh V <aneesh@ti.com>2011-11-21 23:33:58 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-06 23:59:33 +0100
commitdc7100f4080952798413fb63bb4134b22c57623a (patch)
tree7bfcccdda9fd068d855fb8f20cf110c831678bb8 /arch
parent8f1da53508c78789ebeea98a92a3f55c3f84dc5d (diff)
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armv7: disable L2 cache in cleanup_before_linux()
We were not disabling external caches before jumping to kernel. We were flushing all caches including external caches and disabling caches globally in CP15 System Control register. Apparently this is not enough. The bootstrap loader in Linux kernel that does decompression enables data-caches again, flush them after use and disable them before jumping to kernel proper. However, it's not aware of the external caches. Since we have left external cache enabled, external cache will get used once caches are enabled globally, but it's not flushed because decompressor is not aware of external caches. When it jumps to kernel with caches disabled globally, we have stale data in the external cache and a coherency problem. This was breaking the boot for OMAP4 with latest mainline kernel. The solution is to disable external caches in cleanup_before_linux(). With this fix kernel is booting again. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/cpu.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index 091e3e0..662c496 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -65,6 +65,7 @@ int cleanup_before_linux(void)
* dcache_disable() in turn flushes the d-cache and disables MMU
*/
dcache_disable();
+ v7_outer_cache_disable();
/*
* After D-cache is flushed and before it is disabled there may