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* | | | x86: Change pci option rom area MTRR setting to cacheableBin Meng2015-07-28-7/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Turn on cache on the pci option rom area to improve the performance. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | x86: Simplify architecture defined exception handling in irq_llsr()Bin Meng2015-07-28-105/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using switch..case for architecture defined exceptions, simply unify the handling by printing a message of exception name, followed by registers dump then halt the CPU. With this unification, it also fixes the wrong exception numbers for #MF/#AC/#MC/#XM which should be 16/17/18/19 not 15/16/17/18. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | x86: Display correct CS/EIP/EFLAGS when there is an error codeBin Meng2015-07-28-4/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some exceptions cause an error code to be saved on the current stack after the EIP value. We should extract CS/EIP/EFLAGS from different position on the stack based on the exception number. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-07-28-62/+1238
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| * | | | ARM: zynqmp: Wire up SATA for the boardMichal Simek2015-07-28-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable SATA for the ZynqMP targets. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynqmp: Wire up ethernet controllersMichal Simek2015-07-28-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wire up ethernet controllers and enable MII and BOOTP options. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: Add support for zc770-xm011Michal Simek2015-07-28-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add xm011 DTS file and related configs and configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Update zc770 dtsesMichal Simek2015-07-28-12/+176
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Platform DTSes are missing content needed for platform to be able to use OF binding and DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Add zc702 pushbuttons to DT as gpio-keysMichal Simek2015-07-28-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds the two MIO connected pushbuttons on the zc702 board to the devicetree as a single multi-key device for us with the gpio-keys driver. Signed-off-by: Ezra Savard <ezra.savard@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Add missing interrupt for L2 pl310Michal Simek2015-07-28-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pl310 interrupt to the Zynq devicetree. Signed-off-by: Alex Wilson <alex.david.wilson@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Get rid of ps-clk-frequencyMichal Simek2015-07-28-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ps-clk-frequency is platform specific setting and shouldn't be the part of DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Update years in copyrightMichal Simek2015-07-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trivial. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Sync zc702/zc706/zed/zybo DT with kernelMichal Simek2015-07-28-13/+715
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Syncup with the latest DT from the Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Add reference to bus nodeMichal Simek2015-07-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For adding OCM memory in platform DTS is necessary to have reference to amba bus. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Add pinctrl nodeMichal Simek2015-07-28-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl node to DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Cleanup address-cells and size-cellsMichal Simek2015-07-28-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded address-cells form intc node because it is already setup in parent node. Add missing address-cells and size-cells to eth node to be shared for every platform DTSes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Clean up timer device tree nodesMichal Simek2015-07-28-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Separate IRQ cells from each other for easier reading. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Use the zynq binding with macbMichal Simek2015-07-28-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the new zynq binding for macb ethernet, since it will disable half duplex gigabit like the Zynq TRM says to do. Also allow the compatible cadence gem binding that won't disable half duplex but works otherwise. Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Fix GEM register area sizeMichal Simek2015-07-28-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The size of the GEM's register area is only 0x1000 bytes. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | spi: Fix zynq SPI bindingMichal Simek2015-07-28-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zynq is using Cadence IP where binding is documented in the Linux kernel and there is no reason to use different binding. Synchronize it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Remove 222 MHz OPPMichal Simek2015-07-28-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to dependencies between timer and CPU frequency, only changes by powers of two are allowed. The clocksource driver prevents other changes, but with cpufreq and its governors it can result in being spammed with error messages constantly. Hence, remove the 222 MHz OPP. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Migrate UART to Cadence bindingMichal Simek2015-07-28-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Zynq UART is Cadence IP and the driver has been renamed accordingly. Migrate the DT to use the new binding for the UART driver. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Acked-by: Rob Herring <robh@kernel.org> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Add a fixed regulator for CPU voltageMichal Simek2015-07-28-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To silence the warning cpufreq_cpu0: failed to get cpu0 regulator: -19 from the cpufreq driver regarding a missing regulator, add a fixed regulator to the DT. Zynq does not support voltage scaling and the CPU rail should always be supplied with 1 V, hence it is added in the SOC-level dtsi. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Add missing nodes to DTSIMichal Simek2015-07-28-0/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ADC, CAN, GPIO, MC, DMA, DEVCFG, USB, Watchdog IPs to DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Use the right names for nodesMichal Simek2015-07-28-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on SPEC you right names with addresses. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynqmp: Add support for IP detection via SLCRMichal Simek2015-07-28-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SLCR can be used for IP configuration setting. Add SLCR skeleton to enable run time checking. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynqmp: mp: Simplify set_r5_start handlingMichal Simek2015-07-28-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass directly boot_addr which is LOVEC (0) or HIVEC (0xffff0000). No reason to use magic values 0 and 1. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynqmp: Define ep config for ZynqMPSiva Durga Prasad Paladugu2015-07-28-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define a new config "zynqmp_ep" for ZynqMP instead of xilinx_zynqmp. This defconfig supports all emulation platforms of ZynqMP. Also renamed TARGET_XILINX_ZYNQMP to ARCH_ZYNQMP. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynqmp: Kconfig: Move zynqmp KconfigSiva Durga Prasad Paladugu2015-07-28-1/+17
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the zynqmp Kconfig from board to arch as there may be different boards under same architecture. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | stm32f4: add cpu clock option for 180 MHzAntonio Borneo2015-07-27-10/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While most stm32f4 run at 168 MHz, stm32f429 can work till 180 MHz. Add option to select 180 MHz through macro CONFIG_SYS_CLK_FREQ. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> To: Albert Aribaud <albert.u.boot@aribaud.net> To: Tom Rini <trini@konsulko.com> To: Kamil Lulko <rev13@wp.pl> Cc: u-boot@lists.denx.de
* | | | stm32f429: pass the device unique ID in DTBAntonio Borneo2015-07-27-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read device unique ID and set environment variable "serial#". Value would then be passed to kernel through DTB. To read ID from DTB, kernel is required to have commit: 3f599875e5202986b350618a617527ab441bf206 (ARM: 8355/1: arch: Show the serial number from devicetree in cpuinfo) This commit is already mainline since v4.1-rc1. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> To: Albert Aribaud <albert.u.boot@aribaud.net> To: Tom Rini <trini@konsulko.com> To: Kamil Lulko <rev13@wp.pl> Cc: u-boot@lists.denx.de
* | | | Kill unneeded #include <linux/kconfig.h>Masahiro Yamada2015-07-27-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the top-level Makefile forces all the source files to include include/linux/kconfig.h (see the UBOOTINCLUDE define), these includes are redundant. By the way, there are exceptions for the statement above; host programs. In fact, host tools in U-Boot depend on a particular board configuration, although I think they should not. So, some files still include <linux/config.h> to work around build errors on host tools. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | | | am33xx: Unused get_board_rev function removalPaul Kocialkowski2015-07-27-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All am33xx device tree are using device-tree, so get_board_rev is never actually called. Thus, we can get rid of it to make the code easier to maintain. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | | omap3: CONFIG_REVISION_TAG ifdef check for get_board_revPaul Kocialkowski2015-07-27-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Despite being defined with __weak, this declaration of get_board_rev will conflict with the fallback one when ONFIG_REVISION_TAG is not defined. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | | omap5: Definitions for SYS_BOOT-based fallback boot device selectionPaul Kocialkowski2015-07-27-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces code to read the value of the SYS_BOOT pins on the OMAP5, as well as the memory-preferred scheme for the interpretation of each value. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | omap4: Definitions for SYS_BOOT-based fallback boot device selectionPaul Kocialkowski2015-07-27-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces code to read the value of the SYS_BOOT pins on the OMAP4, as well as the memory-preferred scheme for the interpretation of each value. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | omap3: Definitions for SYS_BOOT-based fallback boot device selectionPaul Kocialkowski2015-07-27-1/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces code to read the value of the SYS_BOOT pins on the OMAP3, as well as the memory-preferred scheme for the interpretation of each value. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | omap-common: SYS_BOOT-based fallback boot device selection for peripheral bootPaul Kocialkowski2015-07-27-7/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP devices might boot from peripheral devices, such as UART or USB. When that happens, the U-Boot SPL tries to boot the next stage (complete U-Boot) from that peripheral device, but in most cases, this is not a valid boot device. This introduces a fallback option that reads the SYS_BOOT pins, that are used by the bootrom to determine which device to boot from. It is intended for the SYS_BOOT value to be interpreted in the memory-preferred scheme, so that the U-Boot SPL can load the next stage from a valid location. Practically, this options allows loading the U-Boot SPL through USB and have it load the next stage according to the memory device selected by SYS_BOOT instead of stalling. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | omap-common: Boot device define instead of hardcoded valuePaul Kocialkowski2015-07-27-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that SPL boot devices are clearly defined, we can use BOOT_DEVICE_QSPI_4 instead of a hardcoded value. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | omap: SPL boot devices cleanup and completionPaul Kocialkowski2015-07-27-67/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This cleans up the SPL boot devices for omap platforms and introduces support for missing boot devices. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | omap-common: Common boot code OMAP3 support and cleanupPaul Kocialkowski2015-07-27-166/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces OMAP3 support for the common omap boot code, as well as a major cleanup of the common omap boot code. First, the omap_boot_parameters structure becomes platform-specific, since its definition differs a bit across omap platforms. The offsets are removed as well since it is U-Boot's coding style to use structures for mapping such kind of data (in the sense that it is similar to registers). It is correct to assume that romcode structure encoding is the same as U-Boot, given the description of these structures in the TRMs. The original address provided by the bootrom is passed to the U-Boot binary instead of a duplicate of the structure stored in global data. This allows to have only the relevant (boot device and mode) information stored in global data. It is also expected that the address where the bootrom stores that information is not overridden by the U-Boot SPL or U-Boot. The save_omap_boot_params is expected to handle all special cases where the data provided by the bootrom cannot be used as-is, so that spl_boot_device and spl_boot_mode only return the data from global data. All of this is only relevant when the U-Boot SPL is used. In cases it is not, save_boot_params should fallback to its weak (or board-specific) definition. save_omap_boot_params should not be called in that context either. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86Masahiro Yamada2015-07-27-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The symbolic link to SoC/CPU specific header directory is created during the build, while it is only necessary for ARM, AVR32, SPARC, x86, and some CPUs of PowerPC. For the other architectures, it just results in a broken symbolic link. Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic links. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | | keystone2: add wfi in to the core_spin loopVitaly Andrianov2015-07-27-2/+7
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | When core A turning of core B, via tetris DPSC it places the core B DPSC into transitional state. The core B has to execute wfi instruction to move its DPSC to the OFF state. This patch add such instruction. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-07-25-29/+116
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| * | | sunxi: ga10h: Enable both otg and regular usb host controllersHans de Goede2015-07-25-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows using devices plugged into both ports of the tablet. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: musb: Stop treating not having a vbus-det gpio as an errorHans de Goede2015-07-25-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some boards the otg is wired up in host-only mode in this case we have no vbus-det gpio. Stop logging an error from sunxi_usb_phy_vbus_detect() in this case, and stop treating sunxi_usb_phy_vbus_detect() returning a negative errno, as if a charger is plugged into the otg port. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: musb: Use device-model for musb host modeHans de Goede2015-07-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the sunxi musb glue to use the device-model for musb host mode. This allows using musb in host mode together with other host drivers such as ehci / ohci, which is esp. useful on boards which use the musb controller in host-only mode, these boards have e.g. an usb-a receptacle or an usb to sata converter attached to the musb controller. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: musb: Move musb config and platdata to the sunxi-musb glueHans de Goede2015-07-25-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the musb config and platdata to the sunxi-musb glue, which is where it really belongs. This is preparation patch for adding device-model support for the sunxi-musb-host code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: usb-phy: Add support for reading otg id pin valueHans de Goede2015-07-25-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for reading the id pin value of the otg connector to the usb phy code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Enable CMD_USB and USB_STORAGE by default on sunxiHans de Goede2015-07-25-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start using the new Kconfig options which are available for these now, and simply always enable them by selecting them as sunxi builds always include USB support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-10-08 14:21:57 +0000