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authorMichal Simek <michal.simek@xilinx.com>2015-07-23 13:27:40 +0200
committerMichal Simek <michal.simek@xilinx.com>2015-07-28 11:56:27 +0200
commit6fe6f1350990c28d3675392cc273cb3df8c31389 (patch)
tree9bd623c01e9cd18cdd7878c3721c8c3c248ea612 /arch
parentcb7ea82059069c6509c26b1f705982c6a919a3fe (diff)
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ARM: zynqmp: Wire up SATA for the board
Enable SATA for the ZynqMP targets. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-zynqmp/hardware.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h
index 5d191e8..7640eab 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -25,6 +25,8 @@
#define ZYNQ_SDHCI_BASEADDR0 0xFF160000
#define ZYNQ_SDHCI_BASEADDR1 0xFF170000
+#define ZYNQMP_SATA_BASEADDR 0xFD0C0000
+
#define ZYNQMP_CRL_APB_BASEADDR 0xFF5E0000
#define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT 0x1000000