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* mxs: regs-common.h must be wrapped with !__ASSEMBLY__Peng Fan2015-11-12-1/+1
| | | | | | | regs-common.h must be wrapped with #ifndef __ASSEMBLY__ Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* mxs: add parameter base_addr for mxs_set_lcdclkPeng Fan2015-11-12-2/+2
| | | | | | | | | | | Change mxs_set_lcdclk prototype to add a new parameter base_addr. There are two LCD interfaces for i.MX6SX, we may support LCDIF1 or LCDIF2. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
* mx7: psci: add basic psci supportPeng Fan2015-11-12-0/+139
| | | | | | | | | | | | 1. add basic psci support for imx7 chip. 2. support cpu_on and cpu_off. 3. switch to non-secure mode when boot linux kernel. 4. set csu allow accessing all peripherial register in non-secure mode. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* arm: discard relocation entries for secure textPeng Fan2015-11-12-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code such as PSCI in section named secure is bundled with u-boot image, and when bootm, the code will be copied to their runtime address same to compliation/linking address - CONFIG_ARMV7_SECURE_BASE. When compile the PSCI code and link it into the u-boot image, there will be relocation entries in .rel.dyn section for PSCI. Actually, we do not needs these relocation entries. If still keep the relocation entries in .rel.dyn section, r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid address which may not support read/write for one SoC. 102 /* relative fix: increase location by offset */ 103 add r0, r0, r4 104 ldr r1, [r0] 105 add r1, r1, r4 106 str r1, [r0] So discard them to avoid touching the relocation entry in arch/arm/lib/relocate.S. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Tom Warren <twarren@nvidia.com> Cc: York Sun <yorksun@freescale.com> Cc: Hans De Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* Merge git://git.denx.de/u-bootStefano Babic2015-11-12-1954/+4699
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| * nios2: add 10m50 devboard supportThomas Chou2015-11-12-0/+267
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add 10m50 devboard support. It is based on the Golden Hardware Reference Design (GHRD), available at, http://rocketboards.org/foswiki/view/Documentation/ AlteraMAX1010M50RevCDevelopmentKitLinuxSetup Though we supported only one nios2-generic board in the past. Now, with the removal of the nios2-generic board dir, adding new nios2 boards to u-boot is easier than before. It should be helpful to add those boards supported in Linux mainline. There are only two such nios2 boards, the 3c120 devboard and 10m50 devboard. The nios2-generic is actually 3c120, and should restore the name. The 10m50 is this one. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
| * nios2: add memcpy_fromio and memcpy_toioThomas Chou2015-11-12-0/+4
| | | | | | | | | | | | Add memcpy_fromio() and memcpy_toio(). Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
| * ARM: uniphier: drop UniPhier specific SMP codeMasahiro Yamada2015-11-11-61/+0
| | | | | | | | | | | | | | | | | | | | | | The latest Linux can directly handle SMP operations for UniPhier SoCs without any help of U-boot. Drop the relevant code from U-boot. See commit b1e4006aeda8c8784029de17d47987c21ea75f6d ("ARM: uniphier: rework SMP operations to use trampoline code") in Linux Kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * ARM: dts: uniphier: add USB xHCI nodes for PH1-Pro5 and ProXstream2Masahiro Yamada2015-11-11-0/+60
| | | | | | | | | | | | | | This makes USB3.0 available on new SoCs/boards. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * ARM: dts: uniphier: fix interrupt number of USB core for PH1-Pro4Masahiro Yamada2015-11-11-1/+1
| | | | | | | | | | | | | | The IRQ is not used in U-Boot, but this would be useful to sync device trees between Linux and U-Boot. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2015-11-10-12/+300
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| | * ARM: tegra: add custom MMU setup on ARMv8Stephen Warren2015-11-10-0/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This sets up a fine-grained page table, which is a requirement for noncached_init() to operate correctly. MMU setup code currently exists in a number of places: - A version in the core ARMv8 support code that sets up page tables that use very large block sizes that CONFIG_SYS_NONCACHED_MEMORY doesn't support. - Enhanced versions for fsl-lsch3 and zynmq that set up finer grained page tables. Ideally, rather than duplicating the MMU setup code yet again this patch would instead consolidate all the different routines into the core ARMv8 code so that it supported all use-cases. However, this will require significant effort since there appear to be a number of discrepancies[1] between different versions of the code, and between the defines/values by some copies of the MMU setup code use and the architectural MMU documentation. Some reverse engineering will be required to determine the intent of the current code. [1] For example, in the core ARMv8 MMU setup code, three defines named TCR_EL[123]_IPS_BITS exist, but only one of them sets the IPS field and the others set a different field (T1SZ) in the page tables. As far as I can tell so far, there should be no need to set different values per exception level nor to modify the T1SZ field at all, since TTBR1 shouldn't be enabled anyway. Another example is inconsistent values for *_VA_BITS between the current core ARMv8 MMU setup code and the various SoC- specific MMU setup code. Another example is that asm/armv8/mmu.h's value for SECTION_SHIFT doesn't match asm/system.h's MMU_SECTION_SHIFT; research is needed to determine which code relies on which of those values and why, and whether fixing the incorrect value will cause any regression. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * armv8: allow custom MMU setup routines on ARMv8Stephen Warren2015-11-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order for noncached_init() to operate correctly, SoCs must set up a custom page table with fine-grained (2MiB) sections, which can be configured from noncached_init(). This is currently performed by arch/arm/cpu/armv8/{fsl-lsch3,zynqmp}/cpu.c by cut/pasting and re-implementing mmu_setup, enable_caches(), etc. There are some other reasons for the duplication there though, such as enabling icache early, and enabling dcaching earlier with a different configuration. This change makes mmu_setup() a weak implementation, so that the MMU setup code can be replaced without having to duplicate other code that calls it. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORYStephen Warren2015-11-10-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The implementation of noncached_init() uses define MMU_SECTION_SIZE. Define this on ARM64. Move the prototype of noncached_{init,alloc}() to a location that doesn't depend on !defined(CONFIG_ARM64). Note that noncached_init() calls mmu_set_region_dcache_behaviour() which relies on something having set up translation tables with 2MB block size. The core ARMv8 MMU setup code does not do this by default, but currently relies on SoC specific MMU setup code. Be aware of this before enabling this feature on your platform! Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * arm: stm32f4: fix a bug when a random sector gets erasedVadzim Dambrouski2015-11-10-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Old sector number is not being cleared from FLASH_CR register. For example when first erased sector was 001 and then you want to erase sector 010, sector 011 gets erased instead. This patch clears old sector number from FLASH_CR register before a new one is written. Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
| | * arm: stm32f4: fix a bug when only first sector gets erasedVadzim Dambrouski2015-11-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | flash_lock call is inside a for loop, so after the first iteration flash is locked and no more sectors can be erased. Move flash_lock out of the loop. Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
| | * Revive OpenRD targetsAlbert ARIBAUD2015-11-10-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revert commit 7a2c1b13 which dropped OpenRD boards. Assume maintainership of OpenRD. Remove OpenRD from scrapyard. Switch OpenRD to generic board. Switch to Thumb build. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * kirkwood: support CONFIG_SYS_THUMB_BUILDAlbert ARIBAUD2015-11-10-0/+6
| | | | | | | | | | | | | | | | | | | | | Kirkwood files cpu.c and cache.c cannot build in Thumb state; force them in ARM state even under CONFIG_SYS_THUMB_BUILD. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILDAlbert ARIBAUD2015-11-10-3/+142
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When building a Thumb-1-only target with CONFIG_SYS_THUMB_BUILD, some files fail to build, most of the time because they include mcr instructions, which only exist for Thumb-2. This patch introduces a Kconfig option CONFIG_THUMB2 and uses it to select between Thumb-2 and ARM mode for the aforementioned files. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * arm: fix compile warnings when semihosting is enabled on ARMv7M target.Vadzim Dambrouski2015-11-10-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes compile warnings like this: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'size_t' In C99 standard you can use %zu modifier to print size_t values. Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
| | * arm: add support for semihosting for ARMv7M targetsVadzim Dambrouski2015-11-10-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If you enable CONFIG_SEMIHOSTING for STM32F429 target, you will get compile error looking like this: arch/arm/lib/semihosting.c: In function 'smh_read': {standard input}: Assembler messages: {standard input}:34: Error: invalid swi expression {standard input}:34: Error: value of 1193046 too large for field of 2 bytes at 0 scripts/Makefile.build:277: recipe for target 'arch/arm/lib/semihosting.o' failed The source of the problem is "svc #0x123456" instruction. This instruction can not be encoded using Thumb2 instruction set used by ARMv7M CPUs. ARM documentation suggests using "bkpt #0xAB" instruction instead [1]. This patch fixes compile errors and adds support for semihosting for STM32F429 or any other ARMv7M target. This change was sested on STM32F429-DISCOVERY board using OpenOCD and "smhload" u-boot command. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0471c/Bgbjhiea.html Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
| * | powerpc: Finish updating u-boot*lds scripts for newer binutilsTom Rini2015-11-10-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | In 522b021 we dropped 'PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4)' lines in the mpc85xx linker scripts as this is not required and breaks newer binutils. This commit cleans up the rest of the powerpc linker scripts. Signed-off-by: Tom Rini <trini@konsulko.com>
| * | Various Makefiles: Add SPDX-License-Identifier tagsTom Rini2015-11-10-26/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After consulting with some of the SPDX team, the conclusion is that Makefiles are worth adding SPDX-License-Identifier tags too, and most of ours have one. This adds tags to ones that lack them and converts a few that had full (or in one case, very partial) license blobs into the equivalent tag. Cc: Kate Stewart <kstewart@linuxfoundation.org> Signed-off-by: Tom Rini <trini@konsulko.com>
| * | mpc85xx/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ definitionZhenhua Luo2015-11-09-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in u-boot.lds overrides the linker built-in symbols (https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff; h=b893397a4b1316610f49819344817715e4305de9), so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the .reloc section. To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol should not be defined in sections, and the symbols in linker generated .got section should be used(https://sourceware.org/ml/binutils/2008-09/ msg00122.html) Fixed the following build errors with binutils-2.25: | powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in linker created .got Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
| * | Replace "extern inline" with "static inline"Måns Rullgård2015-11-09-132/+124
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of headers define functions as "extern inline" which is causing problems with gcc5. The reason is that starting with version 5.1, gcc defaults to the standard C99 semantics for the inline keyword. Under the traditional GNU inline semantics, an "extern inline" function would never create an external definition, the same as inline *without* extern in C99. In C99, and "extern inline" definition is simply an external definition with an inline hint. In short, the meanings of inline with and without extern are swapped between GNU and C99. The upshot is that all these definitions in header files create an external definition wherever those headers are included, resulting in multiple definition errors at link time. Changing all these functions to "static inline" fixes the problem since this works as desired in all gcc versions. Although the semantics are slightly different (a static inline definition may result in an actual function being emitted), it works as intended in practice. This patch also removes extern prototype declarations for the changed functions where they existed. Signed-off-by: Mans Rullgard <mans@mansr.com>
| * ARM64: zynqmp: Sync zynq_sdhci_init() declarationMichal Simek2015-11-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix compilation error: drivers/mmc/zynq_sdhci.c:16:5: error: conflicting types for ‘zynq_sdhci_init’ int zynq_sdhci_init(phys_addr_t regbase) ^ In file included from drivers/mmc/zynq_sdhci.c:14:0: ./arch/arm/include/asm/arch/sys_proto.h:16:5: note: previous declaration of ‘zynq_sdhci_init’ was here int zynq_sdhci_init(unsigned long regbase); ^ Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-niosTom Rini2015-11-06-13/+17
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| | * nios2: fix cached mode in clearing the BSSThomas Chou2015-11-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | As the generic board runs in cached mode, it should not use "stwio" which bypass the cache. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Chin Liang See <clsee@altera.com>
| | * nios2: remove CONFIG_SYS_INIT_SP macroThomas Chou2015-11-06-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove CONFIG_SYS_INIT_SP macro, as the initial stack is set to below the u-boot code. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Chin Liang See <clsee@altera.com>
| | * nios2: change virt_to_phys to use physaddr_mask in global dataThomas Chou2015-11-06-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | As virt_to_phys() is used a lot in DMA transfer, change it to use physaddr_mask in global data. This will save an "if" statement and get a little faster. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
| | * nios2: remove the useless parenthesis in asm/io.hThomas Chou2015-11-06-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Remove the useless parenthesis in asm/io.h as suggested by Marek. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
| | * nios2: fix map_physmem to do real cache mappingThomas Chou2015-11-06-3/+9
| | | | | | | | | | | | | | | | | | | | | Fix the map_physmem() to do real cache mapping. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
| * | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2015-11-06-104/+92
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| | * | MIPS: bootm: use CONFIG_IS_ENABLED() everywhereDaniel Schwierzeck2015-11-06-19/+14
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| | * | MIPS: bootm: rework and fix broken bootm codeDaniel Schwierzeck2015-11-06-85/+78
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The move to 'generic board' as well as changes in the generic bootm code broke the boot of FIT uImage's. Especially uImage's with additional initramfs images or FDT's do not work anymore. Refactor the bootm code to work again with the generic bootm code. Always relocate ramdisk and FDT in step 'bootm prep' because the generic bootm code does this only for legacy uImage's. Move the step 'bootm cmdline' to 'bootm prep' because the Linux kernel parameters rd_start and rd_size have to be initialized after the relocation of the ramdisk. Furthermore support the step 'bootm fake'. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | powerpc: Remove __ilog2_u64 and ffs4 from bitopsFabio Estevam2015-11-05-14/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove __ilog2_u64 and ffs4 from powerpc bitops to align with the kernel implementation. Use the generic __ffs64 instead of a custom powerpc implementation. Cc: York Sun <yorksun@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | compat: Remove is_power_of_2() definitionFabio Estevam2015-11-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the is_power_of_2() definition from log2.h to align with the kernel implementation. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | avr32: Use the generic bitops headersFabio Estevam2015-11-05-0/+5
| | | | | | | | | | | | | | | | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | arc: Use the generic bitops headersFabio Estevam2015-11-05-0/+5
| | | | | | | | | | | | | | | | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mips: Use the generic bitops headersFabio Estevam2015-11-05-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | nios2: Use the generic bitops headersFabio Estevam2015-11-05-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | nds32: Use the generic bitops headersFabio Estevam2015-11-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | openrisc: Use the generic bitops headersFabio Estevam2015-11-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | sparc: Use the generic bitops headersFabio Estevam2015-11-05-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | sandbox: Use the generic bitops headersFabio Estevam2015-11-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | microblaze: Use the generic bitops headersFabio Estevam2015-11-05-0/+4
| | | | | | | | | | | | | | | | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | sh: Use the generic bitops headersFabio Estevam2015-11-05-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | blackfin: Use the generic bitops headersFabio Estevam2015-11-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | m68k: Use the generic bitops headersFabio Estevam2015-11-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | x86: Use the generic bitops headersFabio Estevam2015-11-05-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the generic bitops and also add custom __ffs() implementation as per the kernel. Also align the ffs() implementation with the kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>
generated by cgit v1.1 at 2024-11-11 17:15:19 +0000