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* x86: Remove MARK_GRAPHICS_MEM_WRCOMBBin Meng2015-07-14-8/+0
* x86: Move VGA option rom macros to KconfigBin Meng2015-07-14-0/+22
* x86: cmd_mtrr: Improve MTRR list informationBin Meng2015-07-14-1/+2
* x86: queensbay: Change CPU_ADDR_BITS to 32Bin Meng2015-07-14-0/+4
* x86: Setup fixed range MTRRs for legacy regionsBin Meng2015-07-14-11/+38
* x86: bios: Allow pci config read/write to host bridge in int1a_handlerJian Luo2015-07-14-9/+1
* x86: bios: Synchronize stack between real and protected modeJian Luo2015-07-14-0/+23
* x86: queensbay: Change PCIe root ports' interrupt routingBin Meng2015-07-14-10/+23
* x86: Generate a valid MultiProcessor (MP) tableBin Meng2015-07-14-0/+181
* x86: Add MultiProcessor (MP) table APIsBin Meng2015-07-14-0/+688
* x86: Remove inline for lapic access routinesBin Meng2015-07-14-151/+153
* x86: Add I/O APIC register access routinesBin Meng2015-07-14-1/+46
* x86: Clean up ioapic header fileBin Meng2015-07-14-23/+3
* x86: Reduce PIRQ routing table sizeBin Meng2015-07-14-9/+56
* x86: Ignore function number when writing PIRQ routing tableBin Meng2015-07-14-4/+3
* x86: Write correct bus number for the irq routerBin Meng2015-07-14-1/+1
* x86: queensbay: Correct Topcliff device irqsBin Meng2015-07-14-12/+12
* x86: crownbay: Enable DM RTC supportBin Meng2015-07-14-0/+7
* x86: crownbay: Add MP initializationBin Meng2015-07-14-0/+20
* x86: Clean up lapic codesBin Meng2015-07-14-183/+103
* x86: Move lapic_setup() call into init_bsp()Bin Meng2015-07-14-3/+1
* x86: Move MP initialization codes into a common placeBin Meng2015-07-14-73/+112
* x86: ivybridge: Remove SMP from CPU_SPECIFIC_OPTIONSBin Meng2015-07-14-1/+0
* x86: kconfig: Fix minor nits in MAX_CPUSBin Meng2015-07-14-12/+12
* x86: kconfig: Make MAX_CPUS and AP_STACK_SIZE depend on SMPBin Meng2015-07-14-0/+2
* x86: dm: Clean up cpu driversBin Meng2015-07-14-55/+86
* x86: fsp: Move FspInitEntry call to board_init_f()Bin Meng2015-07-14-22/+21
* x86: fsp: Load GDT before calling FspInitEntryBin Meng2015-07-14-2/+33
* x86: Add Kconfig options to be used by arch/x86/cpu/config.mkBin Meng2015-07-14-3/+18
* Move default y configs out of arch/board KconfigJoe Hershberger2015-06-25-15/+0
* x86: gpio: add pinctrl support from the device treeGabriel Huau2015-06-04-0/+24
* x86: baytrail: pci region 3 is not always mapped to end of ramAndrew Bradford2015-06-04-1/+1
* x86: qemu: Implement PIRQ routingBin Meng2015-06-04-0/+61
* x86: coreboot: Control I/O port 0xb2 writing via device treeBin Meng2015-06-04-3/+10
* x86: qemu: Create separate i440fx and q35 device treesBin Meng2015-06-04-2/+37
* x86: coreboot: Fix cosmetic issuesBin Meng2015-06-04-25/+3
* x86: kconfig: Make FSP_TEMP_RAM_ADDR depend on HAVE_FSPBin Meng2015-06-04-0/+1
* x86: qemu: Adjust VGA initializationBin Meng2015-06-04-19/+17
* x86: qemu: Enable legacy IDE I/O ports decodeBin Meng2015-06-04-0/+38
* x86: qemu: Turn on legacy segments decodeBin Meng2015-06-04-0/+26
* x86: fsp_support: Correct high mem comment typoAndrew Bradford2015-06-04-1/+1
* x86: Do sanity test on pirq table before writingBin Meng2015-06-04-0/+3
* x86: quark: Implement PIRQ routingBin Meng2015-06-04-15/+123
* x86: Refactor PIRQ routing supportBin Meng2015-06-04-300/+383
* x86: qemu: Add graphics supportBin Meng2015-06-04-1/+23
* x86: Move FRAMEBUFFER_SET_VESA_MODE etc to video KconfigBin Meng2015-06-04-141/+0
* x86: Make QEMU the default vendorBin Meng2015-06-04-1/+1
* x86: Support QEMU x86 targetsBin Meng2015-06-04-1/+259
* x86: Enable multi-core init for Minnowboard MAXSimon Glass2015-04-30-0/+20
* x86: Add a CPU driver for baytrailSimon Glass2015-04-30-6/+227
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