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* x86: Add Intel Bayley Bay board supportBin Meng2015-08-05-1/+136
* x86: Add microcode for BayTrail-I B0 steppingBin Meng2015-08-05-0/+4244
* x86: baytrail: Update UPD setting for FSP Gold4 releaseBin Meng2015-08-05-1/+2
* x86: qemu: Add MP initializationBin Meng2015-08-05-0/+14
* x86: Add a 'pause' instruction in __udelay() for QEMU targetMiao Yan2015-08-05-0/+8
* x86: Reserve PCIe ECAM address range in the E820 tableBin Meng2015-07-28-1/+20
* x86: qemu: Turn on PCIe ECAM address range decoding on Q35Bin Meng2015-07-28-0/+8
* x86: qemu: Enable writing MP tableBin Meng2015-07-28-3/+55
* x86: Allow cpu-x86 driver to be probed for UPBin Meng2015-07-28-0/+9
* x86: qemu: Enable I/O APIC chip select on PIIX3Bin Meng2015-07-28-2/+11
* x86: mpspec: Move writing ISA interrupt entry after PCIBin Meng2015-07-28-5/+21
* x86: mpspec: Allow platform to determine how PIRQ is connected to I/O APICBin Meng2015-07-28-7/+34
* x86: Convert to use driver model pci on queensbay/crownbayBin Meng2015-07-28-53/+5
* x86: pci: Do not assign irq 0 to pci deviceBin Meng2015-07-28-0/+2
* x86: pci: Assign pci irqs to all functionsBin Meng2015-07-28-14/+19
* x86: Enable DM RTC support for all x86 boardsBin Meng2015-07-28-9/+31
* x86: Change pci option rom area MTRR setting to cacheableBin Meng2015-07-28-7/+22
* x86: Simplify architecture defined exception handling in irq_llsr()Bin Meng2015-07-28-105/+46
* x86: Display correct CS/EIP/EFLAGS when there is an error codeBin Meng2015-07-28-4/+65
* Kill unneeded #include <linux/kconfig.h>Masahiro Yamada2015-07-27-1/+0
* x86: delete unneeded declarations of disable_irq() and enable_irq()Masahiro Yamada2015-07-22-4/+0
* dm: x86: baytrail: Correct PCI region 3 when driver model is usedSimon Glass2015-07-14-0/+2
* dm: x86: minnowmax: Move PCI to use driver modelSimon Glass2015-07-14-47/+10
* x86: pci: Tidy up the generic x86 PCI driverSimon Glass2015-07-14-22/+0
* x86: Configure VESA parameters before loading Linux kernelBin Meng2015-07-14-0/+3
* x86: Remove MARK_GRAPHICS_MEM_WRCOMBBin Meng2015-07-14-8/+0
* x86: Move VGA option rom macros to KconfigBin Meng2015-07-14-0/+22
* x86: cmd_mtrr: Improve MTRR list informationBin Meng2015-07-14-1/+2
* x86: queensbay: Change CPU_ADDR_BITS to 32Bin Meng2015-07-14-0/+4
* x86: Setup fixed range MTRRs for legacy regionsBin Meng2015-07-14-11/+38
* x86: bios: Allow pci config read/write to host bridge in int1a_handlerJian Luo2015-07-14-9/+1
* x86: bios: Synchronize stack between real and protected modeJian Luo2015-07-14-0/+23
* x86: queensbay: Change PCIe root ports' interrupt routingBin Meng2015-07-14-10/+23
* x86: Generate a valid MultiProcessor (MP) tableBin Meng2015-07-14-0/+181
* x86: Add MultiProcessor (MP) table APIsBin Meng2015-07-14-0/+688
* x86: Remove inline for lapic access routinesBin Meng2015-07-14-151/+153
* x86: Add I/O APIC register access routinesBin Meng2015-07-14-1/+46
* x86: Clean up ioapic header fileBin Meng2015-07-14-23/+3
* x86: Reduce PIRQ routing table sizeBin Meng2015-07-14-9/+56
* x86: Ignore function number when writing PIRQ routing tableBin Meng2015-07-14-4/+3
* x86: Write correct bus number for the irq routerBin Meng2015-07-14-1/+1
* x86: queensbay: Correct Topcliff device irqsBin Meng2015-07-14-12/+12
* x86: crownbay: Enable DM RTC supportBin Meng2015-07-14-0/+7
* x86: crownbay: Add MP initializationBin Meng2015-07-14-0/+20
* x86: Clean up lapic codesBin Meng2015-07-14-183/+103
* x86: Move lapic_setup() call into init_bsp()Bin Meng2015-07-14-3/+1
* x86: Move MP initialization codes into a common placeBin Meng2015-07-14-73/+112
* x86: ivybridge: Remove SMP from CPU_SPECIFIC_OPTIONSBin Meng2015-07-14-1/+0
* x86: kconfig: Fix minor nits in MAX_CPUSBin Meng2015-07-14-12/+12
* x86: kconfig: Make MAX_CPUS and AP_STACK_SIZE depend on SMPBin Meng2015-07-14-0/+2
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