summaryrefslogtreecommitdiff
path: root/arch/x86/lib
Commit message (Collapse)AuthorAgeLines
* libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORYMasahiro Yamada2016-12-02-0/+5
| | | | | | | | | | | | | | | | | | Commit e2f88dfd2d96 ("libfdt: Introduce new ARCH_FIXUP_FDT option") allows us to skip memory setup of DTB, but a problem for ARM is that spin_table_update_dt() and psci_update_dt() are skipped as well if CONFIG_ARCH_FIXUP_FDT is disabled. This commit allows us to skip only fdt_fixup_memory_banks() instead of the whole of arch_fixup_fdt(). It will be useful when we want to use a memory node from a kernel DTB as is, but need some fixups for Spin-Table/PSCI. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed build error for x86: Signed-off-by: Simon Glass <sjg@chromium.org>
* efi_loader: Allow to compile helloworld.efi w/o bundling itAlexander Graf2016-11-27-1/+1
| | | | | | | | | | | | | | | | | Today we can compile a self-contained hello world efi test binary that allows us to quickly verify whether the EFI loader framwork works. We can use that binary outside of the self-contained test case though, by providing it to a to-be-tested system via tftp. This patch separates compilation of the helloworld.efi file from including it in the u-boot binary for "bootefi hello". It also modifies the efi_loader test case to enable travis to pick up the compiled file. Because we're now no longer bloating the resulting u-boot binary, we can enable compilation always, giving us good travis test coverage. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* ls2080: Exit dpaa only right before exiting U-BootAlexander Graf2016-11-17-0/+4
| | | | | | | | | | | | | | | | | | | | | On ls2080 we have a separate network fabric component which we need to shut down before we enter Linux (or any other OS). Along with that also comes configuration of the fabric using a description file. Today we always stop and configure the fabric in the boot script and (again) exit it on device tree generation. This works ok for the normal booti case, but with bootefi the payload we're running may still want to access the network. So let's add a new fsl_mc command that defers configuration and stopping the hardware to when we actually exit U-Boot, so that we can still use the fabric from an EFI payload. For existing boot scripts, nothing should change with this patch. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: York Sun <york.sun@nxp.com> [agraf: Fix x86 build]
* efi: x86: Adjust EFI files support efi_loaderSimon Glass2016-11-14-4/+5
| | | | | | | | | Add compiler flags and make a few minor adjustments to support the efi loader. Signed-off-by: Simon Glass <sjg@chromium.org> [agraf: Add Kconfig dep] Signed-off-by: Alexander Graf <agraf@suse.de>
* x86: Move efi .S files into the 'lib' directorySimon Glass2016-11-14-18/+18
| | | | | | | | These files now need to be in a standard place so that they can be located by generic Makefile rules. Move them to the 'lib' directory. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
* x86: Move efi .lds files into the 'lib' directorySimon Glass2016-11-14-0/+177
| | | | | | | | These files now need to be in a standard place so that they can be located by generic Makefile rules. Move them to the 'lib' directory. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
* x86: Correct a build warning in x86 tablesSimon Glass2016-11-14-0/+2
| | | | | | | | | There is a build warning for three x86 boards since write_smbios_table_wrapper() is not used. Fix it. Fixes: e824cf3f (smbios: Allow compilation on 64bit systems) Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
* x86: efi: Add EFI loader support for x86Simon Glass2016-10-19-0/+13
| | | | | | | | | | | | | Add the required pieces to support the EFI loader on x86. Since U-Boot only builds for 32-bit on x86, only a 32-bit EFI application is supported. If a 64-bit kernel must be booted, U-Boot supports this directly using FIT (see doc/uImage.FIT/kernel.its). U-Boot can act as a payload for both 32-bit and 64-bit EFI. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* smbios: Allow compilation on 64bit systemsAlexander Graf2016-10-19-1/+6
| | | | | | | | | | | | | | The SMBIOS generation code passes pointers as u32. That causes the compiler to warn on casts to pointers. This patch moves all address pointers to uintptr_t instead. Technically u32 would be enough for the current SMBIOS2 style tables, but we may want to extend the code to SMBIOS3 in the future which is 64bit address capable. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Move smbios generation into arch independent directoryAlexander Graf2016-10-19-271/+1
| | | | | | | | | We will need the SMBIOS generation function on ARM as well going forward, so let's move it into a non arch specific location. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Move table csum into separate fileAlexander Graf2016-10-19-12/+0
| | | | | | | | | We need the checksum function without all the other table functionality soon, so let's split it out into its own C file. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: mrccache: Fix error handling in mrccache_get_region()Simon Glass2016-10-11-3/+5
| | | | | | | This should return normal errors, not device-tree errors. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Drop unused init_helper functionsSimon Glass2016-10-11-10/+0
| | | | | | | | Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add an accelerated memmove() functionSimon Glass2016-10-11-0/+161
| | | | | | | | | Bring in a faster memmove() from Linux 4.7. This speeds up scrolling on the display. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* treewide: replace #include <asm/errno.h> with <linux/errno.h>Masahiro Yamada2016-09-23-1/+1
| | | | | | | | | | | Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
* dm: Use dm_scan_fdt_dev() directly where possibleSimon Glass2016-07-27-12/+1
| | | | | | | Quite a few places have a bind() method which just calls dm_scan_fdt_dev(). We may as well call dm_scan_fdt_dev() directly. Update the code to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Convert users from dm_scan_fdt_node() to dm_scan_fdt_dev()Simon Glass2016-07-27-3/+1
| | | | | | | This new function is more convenient for callers, and handles pre-relocation situations automatically. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Pack global NVS into ACPI tableBin Meng2016-07-12-0/+22
| | | | | | | | | | Now that platform-specific ACPI global NVS is added, pack it into ACPI table and get its address fixed up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: George McCollister <george.mccollister@gmail.com> Tested-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: fsp: Wrap setup_internal_uart() call with CONFIG_INTERNAL_UARTBin Meng2016-07-12-1/+1
| | | | | | | | | | For any FSP-enabled boards that want to enable debug UART support, setup_internal_uart() will be called, but this API is only available on BayTrail platform. Change to wrap it with CONFIG_INTERNAL_UART. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Fix madt lapic generationGeorge McCollister2016-06-12-6/+6
| | | | | | | | | | An accumulated length was incorrectly added to current each pass through the loop. On system with more than 2 cores this caused a corrupt MADT to be generated. Signed-off-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Switch to use SMBIOS Kconfig options when writing SMBIOS tablesBin Meng2016-05-23-5/+5
| | | | | | | | Make use of the newly added Kconfig options of board manufacturer and product name to write SMBIOS tables. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Remove header length check when writing tablesBin Meng2016-05-23-16/+10
| | | | | | | | | | Before moving 'current' pointer during ACPI table writing, we always check the table length to see if it is larger than the table header. Since our purpose is to generate valid tables, the check logic is always true, which can be avoided. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Remove the unnecessary checksum calculation of DSDTBin Meng2016-05-23-6/+0
| | | | | | | | The generated AmlCode[] from IASL already has the calculated DSDT table checksum in place. No need for us to calculate it again. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Switch to ACPI mode by ourselves instead of requested by OSPMBin Meng2016-05-23-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Per ACPI spec, during ACPI OS initialization, OSPM can determine that the ACPI hardware registers are owned by SMI (by way of the SCI_EN bit in the PM1_CNT register), in which case the ACPI OS issues the ACPI_ENABLE command to the SMI_CMD port. The SCI_EN bit effectively tracks the ownership of the ACPI hardware registers. However since U-Boot does not support SMI, we report all 3 fields in FADT (SMI_CMD, ACPI_ENABLE, ACPI_DISABLE) as zero, by following the spec who says: these fields are reserved and must be zero on system that does not support System Management mode. U-Boot seems to behave in a correct way that the ACPI spec allows, at least Linux does not complain, but apparently Windows does not think so. During Windows bring up debugging, it is observed that even these 3 fields are zero, Windows are still trying to issue SMI with hardcoded SMI port address and commands, and expecting SCI_EN to be changed by the firmware. Eventually Windows gives us a BSOD (Blue Screen of Death) saying ACPI_BIOS_ERROR and refuses to start. To fix this, turn on the SCI_EN bit by ourselves. With this patch, now U-Boot can install and boot Windows 8.1/10 successfully with the help of SeaBIOS using legacy interface (non-UEFI mode). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Use high_table_malloc() for tables passing to SeaBIOSBin Meng2016-05-23-3/+1
| | | | | | | | Now that we already reserved high memory for configuration tables, call high_table_malloc() to allocate tables from the region. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Prepare configuration tables in dedicated high memory regionBin Meng2016-05-23-0/+31
| | | | | | | | | | Currently when CONFIG_SEABIOS is on, U-Boot allocates configuration tables via normal malloc(). To simplify, use a dedicated memory region which is reserved on the stack before relocation for this purpose. Add functions for reserve and malloc. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Compile coreboot_table.c only for SeaBIOSBin Meng2016-05-23-1/+1
| | | | | | | coreboot_table.c only needs to be built when SeaBIOS is used. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Fix up PIRQ routing table checksum earlierBin Meng2016-05-23-4/+0
| | | | | | | | | | | | | | | | PIRQ routing table checksum is fixed up in copy_pirq_routing_table(), which is fine if we only write the configuration table once. But with the SeaBIOS case, when we write the table for the second time, the checksum will be fixed up to zero per the checksum algorithm, which is caused by the checksum field not being zero before fix up, since the checksum has already been calculated in the first run. To fix this, move the checksum fixup to create_pirq_routing_table(), so that copy_pirq_routing_table() only does what its function name suggests: copy the table to somewhere else. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Call board_final_cleanup() in last_stage_init()Bin Meng2016-05-23-9/+0
| | | | | | | | | | | At present board_final_cleanup() is called before booting a Linux kernel. This actually needs to be done before booting anything, like SeaBIOS, VxWorks or Windows. Move the call to last_stage_init() instead. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: qemu: fix ACPI Kconfig optionsMiao Yan2016-05-23-1/+1
| | | | | | | | | | | | | | | CONFIG_GENENRATE_ACPI_TABLE controls the generation of ACPI table which uses U-Boot's built-in methods and CONFIG_QEMU_ACPI_TABLE controls whether to load ACPI table from QEMU's fw_cfg interface. But with commit "697ec431469ce0a4c2fc2c02d8685d907491af84 x86: qemu: Drop our own ACPI implementation", there is only one way to support ACPI table for QEMU targets which is the fw_cfg interface. Having two Kconfig options for this purpose is not necessary any more, so this patch consolidates the two. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: Move qfw command over to cmd and add Kconfig entryTom Rini2016-05-23-1/+1
| | | | | | | | | | - Move the command portion of arch/x86/cpu/qemu/fw_cfg.c into cmd/qemu_fw_cfg.c - Move arch/x86/include/asm/fw_cfg.h to include/qemu_fw_cfg.h - Rename ACPI table portion to arch/x86/cpu/qemu/acpi_table.c Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: acpi: Return table length in acpi_create_madt_lapics()Bin Meng2016-05-23-3/+5
| | | | | | | | Like other MADT table write routines, make acpi_create_madt_lapics() return how many bytes it has written instead of the table end addr. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Clean up table header revisionsBin Meng2016-05-23-12/+4
| | | | | | | | | | | | | | The comment of initializing table header revision says: /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */ which might mislead it may increase per ACPI spec revision. However this is not the case. It's actually a fixed number as defined in ACPI spec, and in the laest ACPI spec 6.1, some table header revisions are still 1. Clean these up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Align FACS table to a 64 byte boundaryBin Meng2016-05-23-1/+5
| | | | | | | | | | Per ACPI spec, the FACS table address must be aligned to a 64 byte boundary (Windows checks this, but Linux does not). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Use u32 in table write routinesBin Meng2016-05-23-7/+7
| | | | | | | | Use u32 instead of unsigned long in the table write routines, as other routines do. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Adjust order in acpi_table.cBin Meng2016-05-23-117/+119
| | | | | | | | | | | Rearrange the routine order a little bit, to follow the order in which ACPI table is defined in acpi_table.h. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Change fill_header()Bin Meng2016-05-23-14/+8
| | | | | | | | | | | | | | Rename fill_header() to acpi_fill_header() for consistency. Change its signature to remove the 'length' parameter and make it a public API. Also remove the unnecessary include files, and improve the AmlCode[] comment a little bit. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Remove acpi_create_ssdt_generator()Bin Meng2016-05-23-33/+0
| | | | | | | | | | This acpi_create_ssdt_generator() currently does nothing. Remove this for now. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Various changes to acpi_table.hBin Meng2016-05-23-34/+37
| | | | | | | | | | | | | | | | | | | | | - Use "U-BOOT" and "U-BOOTBL" for the OEM ID and OEM table ID. - Do not typedef acpi_header_t, instead use struct acpi_table_hader. - Use a shorter name aslc_id and aslc-revision. - Change MCFG base address to use 32-bit value pairs (_l and _h). - Apply ACPI_APIC_ prefix to MADT APIC type macros and make their names to be more readable. - Apply __packed to struct acpi_madt_irqoverride and struct acpi_madt_lapic_nmi tables, as they are not naturally aligned by the compiler which leads to wrong sizeof(struct). - Rename model to res1 as it is reserved after ACPI spec 1.0. - Apply ACPI_ prefix to the PM profile macros and change them to enum. - Add ospm_flags to FACS structure which is defined since ACPI 4.0. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: acpi: Fix compiler warnings in write_acpi_tables()Bin Meng2016-05-23-4/+4
| | | | | | | | | | | | Fix the following two build warnings in function 'write_acpi_tables': warning: format '%lx' expects argument of type 'long unsigned int', but argument 2 has type 'u32' [-Wformat=] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Fix build warning in tables.c when CONFIG_SEABIOSBin Meng2016-05-23-0/+1
| | | | | | | | | | | | | The following build warning is seen in tables.c: warning: implicit declaration of function 'memalign' Add the missing header file to fix it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Add an ICH6 pin configuration driverSimon Glass2016-03-17-0/+217
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a driver which sets up the pin configuration on x86 devices with an ICH6 (or later) Platform Controller Hub. The driver is not in the pinctrl uclass due to some oddities of the way x86 devices work: - The GPIO controller is not present in I/O space until it is set up - This is done by writing a register in the PCH - The PCH has a driver which itself uses PCI, another driver - The pinctrl uclass requires that a pinctrl device be available before any other device can be probed It would be possible to work around the limitations by: - Hard-coding the GPIO address rather than reading it from the PCH - Using special x86 PCI access to set the GPIO address in the PCH However it is not clear that this is better, since the pin configuration driver does not actually provide normal pin configuration services - it simply sets up all the pins statically when probed. While this remains the case, it seems better to use a syscon uclass instead. This can be probed whenever it is needed, without any limitations. Also add an 'invert' property to support inverting the input. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Update microcode for secondary CPUsSimon Glass2016-03-17-0/+2
| | | | | | | | Each CPU needs to have its microcode loaded. Add support for this so that all CPUs will have the same version. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Support booting SeaBIOSBin Meng2016-03-17-0/+15
| | | | | | | | | | | | | | | SeaBIOS is an open source implementation of a 16-bit x86 BIOS. It can run in an emulator or natively on x86 hardware with the use of coreboot. With SeaBIOS's help, we can boot some OSes that require 16-bit BIOS services like Windows/DOS. As U-Boot, we have to manually create a table where SeaBIOS gets system information (eg: E820) from. The table unfortunately has to follow the coreboot table format as SeaBIOS currently supports booting as a coreboot payload. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Implement functions for writing coreboot tableBin Meng2016-03-17-0/+137
| | | | | | | | To prepare generating coreboot table from U-Boot, implement functions to handle the writing. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Support writing configuration tables in high areaBin Meng2016-03-17-0/+11
| | | | | | | | | | For those secondary bootloaders like SeaBIOS who want to live in the F segment, which conflicts the configuration table address, now we allow write_tables() to write the configuration tables in high area (malloc'ed memory). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Simplify codes in write_tables()Bin Meng2016-03-17-27/+34
| | | | | | | | Given all table write routines have the same signature, we can simplify the codes by using a function table. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Change write_acpi_tables() signature a little bitBin Meng2016-03-17-2/+2
| | | | | | | | Change the parameter and return value of write_acpi_tables() to u32 to conform with other table write routines. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Use a macro for ROM table alignmentBin Meng2016-03-17-5/+5
| | | | | | | Define ROM_TABLE_ALIGN instead of using 1024 directly. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Change to use start/end address pair in write_tables()Bin Meng2016-03-17-6/+12
| | | | | | | | Add a new variable rom_table_start and pass it to ROM table write routines. This reads better than previous single rom_table_end. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-06 11:57:47 +0000