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authorSimon Glass <sjg@chromium.org>2016-03-11 22:07:11 -0700
committerBin Meng <bmeng.cn@gmail.com>2016-03-17 10:27:25 +0800
commite77b62e2906affb94f442ce7735762883f8147af (patch)
treecccb300e21f32fab3723439a9445b9325d302c4e /arch/x86/lib
parent6499277827f5b0ceeb0447805ba4807307de78d2 (diff)
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x86: Update microcode for secondary CPUs
Each CPU needs to have its microcode loaded. Add support for this so that all CPUs will have the same version. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/lib')
-rw-r--r--arch/x86/lib/fsp/fsp_car.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/lib/fsp/fsp_car.S b/arch/x86/lib/fsp/fsp_car.S
index 15b3751..fbe8aef 100644
--- a/arch/x86/lib/fsp/fsp_car.S
+++ b/arch/x86/lib/fsp/fsp_car.S
@@ -102,6 +102,8 @@ temp_ram_init_romstack:
temp_ram_init_params:
_dt_ucode_base_size:
/* These next two fields are filled in by ifdtool */
+.globl ucode_base
+ucode_base: /* Declared in micrcode.h */
.long 0 /* microcode base */
.long 0 /* microcode size */
.long CONFIG_SYS_MONITOR_BASE /* code region base */