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path: root/arch/x86/dts/crownbay.dts
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* x86: dts: Update to include ACTL register detailsBin Meng2016-05-23-0/+1
* x86: ich6_gpio: Convert to use proper DM APIBin Meng2016-02-05-14/+16
* spi: ich: Use compatible strings to distinguish controller versionBin Meng2016-02-05-1/+1
* x86: Correct spi node aliasBin Meng2016-01-28-2/+2
* dm: x86: queensbay: Add an interrupt driverSimon Glass2016-01-24-1/+1
* dm: x86: spi: Convert ICH SPI driver to driver model PCI APISimon Glass2016-01-24-72/+78
* x86: Fix PCI UART compatible string for crownbay and galileoBin Meng2015-12-09-4/+4
* x86: Convert to use driver model timerBin Meng2015-12-01-0/+1
* x86: crownbay: Convert to use driver model keyboardBin Meng2015-11-19-0/+1
* x86: crownbay: Support Topcliff integrated pci uart devices with driver modelBin Meng2015-08-26-5/+10
* x86: crownbay: Enable on-board SMSC superio keyboard controllerBin Meng2015-08-26-1/+1
* x86: Convert to use driver model pci on queensbay/crownbayBin Meng2015-07-28-1/+5
* x86: queensbay: Change PCIe root ports' interrupt routingBin Meng2015-07-14-4/+16
* x86: queensbay: Correct Topcliff device irqsBin Meng2015-07-14-12/+12
* x86: crownbay: Enable DM RTC supportBin Meng2015-07-14-0/+1
* x86: crownbay: Add MP initializationBin Meng2015-07-14-0/+20
* x86: Refactor PIRQ routing supportBin Meng2015-06-04-0/+54
* x86: Add alias for SPI node in the board dtsBin Meng2015-04-29-1/+5
* x86: crownbay: Add pci devices in the dts fileBin Meng2015-01-13-0/+81
* x86: Clean up the board dts filesBin Meng2015-01-12-8/+3
* x86: Rename coreboot.dsti to serial.dtsiBin Meng2015-01-12-1/+1
* x86: Convert microcode format to device-tree-onlySimon Glass2014-12-18-0/+7
* x86: Add Intel Crown Bay board dts fileBin Meng2014-12-13-0/+53
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