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path: root/arch/x86/dts/chromebook_link.dts
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* x86: ivybridge: Add a driver for the bd82x6x northbridgeSimon Glass2016-01-24-0/+7
* x86: ivybridge: Move lpc_early_init() to probe()Simon Glass2016-01-24-2/+1
* x86: ivybridge: Set up the LPC device using driver modelSimon Glass2016-01-24-0/+1
* dm: x86: spi: Convert ICH SPI driver to driver model PCI APISimon Glass2016-01-24-2/+3
* x86: Convert to use driver model timerBin Meng2015-12-01-0/+1
* x86: Add an i8042 device for boards that have itSimon Glass2015-11-19-0/+5
* x86: Remove unused rw-mrc-cache properties in the link and panther dts filesBin Meng2015-10-21-2/+0
* exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devicesSimon Glass2015-08-31-0/+5
* x86: Enable DM RTC support for all x86 boardsBin Meng2015-07-28-0/+1
* x86: link: Add PCH driver to support SPI FlashSimon Glass2015-04-29-1/+1
* x86: chromebook_link: dts: Add PCH and LPC devicesSimon Glass2015-04-18-31/+39
* dm: x86: pci: Convert chromebook_link to use driver model for pciSimon Glass2015-04-18-1/+2
* dm: x86: pci: Convert coreboot to use driver model for pciSimon Glass2015-04-18-0/+7
* x86: dts: Add SPI flash MRC details for chromebook_linkSimon Glass2015-01-24-1/+14
* x86: Make chromebook_link the default board for corebootBin Meng2015-01-13-1/+216
* x86: Add chromebook_link boardSimon Glass2014-11-21-0/+1
generated by cgit v1.1 at 2024-11-02 04:09:26 +0000