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path: root/arch/x86/cpu/ivybridge/cpu.c
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* dm: x86: pci: Convert chromebook_link to use driver model for pciSimon Glass2015-04-18-7/+9
* x86: Split up arch_cpu_init()Simon Glass2015-04-16-0/+8
* x86: Add a x86_ prefix to the x86-specific PCI functionsSimon Glass2015-04-16-19/+19
* x86: ivybridge: Update microcode early in bootSimon Glass2015-01-13-1/+1
* x86: ivybridge: Drop support for ROM cachingSimon Glass2015-01-13-25/+0
* x86: Add post failure codes for bist and carBin Meng2014-12-13-0/+1
* x86: ivybridge: Add LAPIC supportSimon Glass2014-11-21-0/+3
* x86: ivybridge: Add early init for PCH devicesSimon Glass2014-11-21-0/+141
* x86: ivybridge: Perform Intel microcode update on bootSimon Glass2014-11-21-0/+5
* x86: ivybridge: Check BIST value on bootSimon Glass2014-11-21-0/+16
* x86: ivybridge: Perform initial CPU setupSimon Glass2014-11-21-0/+130
* x86: ivybridge: Add early LPC init so that serial worksSimon Glass2014-11-21-0/+12
* x86: ivybridge: Enable PCI in early initSimon Glass2014-11-21-0/+6
* x86: chromebook_link: Implement CAR support (cache as RAM)Simon Glass2014-11-21-0/+2
* x86: Add chromebook_link boardSimon Glass2014-11-21-0/+42
generated by cgit v1.1 at 2024-11-09 19:16:17 +0000