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path: root/arch/powerpc/cpu/mpc85xx/start.S
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* powerpc/mpc85xx: T104x: Add nand secure boot targetSumit Garg2016-07-21-3/+9
* powerpc/mpc85xx: set L2PE in L2CSR0 before enabling L2 cacheAneesh Bansal2016-05-24-0/+23
* powerpc: mpc85xx: Enable pre-relocation malloc for MPC85xxmario.six@gdsys.cc2016-04-08-0/+30
* powerpc: e6500: Lock/unlock L2 cache instead of L1 as init_ramYork Sun2015-09-01-1/+9
* powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041Aneesh Bansal2015-07-31-0/+11
* powerpc/mpc85xx: Use GOT when loading IVORs post-relocationScott Wood2015-05-04-15/+20
* powerpc/mpc85xx: Remove some dead codeScott Wood2015-04-20-137/+1
* powerpc/mpc85xx: Don't relocate exception vectorsScott Wood2015-04-20-121/+57
* powerpc/mpc85xx: Fix boot_flag for calling board_init_f()York Sun2014-05-13-1/+1
* PPC 85xx QEMU: Don't use HID1Alexander Graf2014-05-13-1/+1
* powerpc:Add support of SPL non-relocationPrabhakar Kushwaha2014-04-22-0/+2
* powerpc/mpc85xx: Move LAW_EN define outside of configPrabhakar Kushwaha2014-04-22-1/+2
* powerpc/mpc85xx: SECURE BOOT- Add secure boot target for B4860QDSAneesh Bansal2014-04-22-1/+2
* powerpc/mpc85xx: SECURE BOOT- Add secure boot target for BSC9132QDSAneesh Bansal2014-04-22-7/+2
* PPC 85xx: Add qemu-ppce500 machineAlexander Graf2014-04-22-0/+11
* PPC: 85xx: Remove IVOR resetAlexander Graf2014-04-22-6/+0
* Remove obsolete _LINUX_CONFIG_H macroMasahiro Yamada2014-01-24-2/+0
* powerpc/corenet: CPC1 speculation disableDave Liu2013-12-04-0/+4
* powerpc/mpc85xx:Make L2 cache type independent of CHASSIS2Prabhakar Kushwaha2013-10-16-1/+1
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-14-1/+1
* powerpc/mpc85xx: Add workaround for erratum A-005125York Sun2013-09-10-0/+8
* powerpc/srio-pcie-boot: Avoid the NOR_BOOT macro when boot from SRIO/PCIELiu Gang2013-08-09-1/+2
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
* powerpc/mpc85xx: modify the functionality clear_bss and aligning the end addr...Ying Zhang2013-06-20-1/+1
* powerpc/mpc85xx: Clear L1 D-cache lockYork Sun2013-05-24-0/+1
* Add e6500 L2 replacement policy selectionJames Yang2013-05-24-0/+1
* Enable L2 cache parity/ECC error checkingJames Yang2013-05-24-1/+1
* e6500: Move L1 enablement after L2 enablementAndy Fleming2013-05-14-47/+47
* powerpc/mpc85xx: Add definitions for HDBCR registersAndy Fleming2013-05-14-4/+4
* Replace __bss_end__ with __bss_endSimon Glass2013-03-15-2/+2
* powerpc/mpc85xx: add support for MMUv2 page sizesScott Wood2013-01-30-1/+1
* spl/powerpc: introduce CONFIG_SPL_INIT_MINIMALScott Wood2012-11-26-13/+20
* powerpc/mpc85xx: fix TLB alignmentScott Wood2012-11-26-4/+4
* powerpc/mpc85xx: move debug tlb entry after TLB is in known stateScott Wood2012-11-26-44/+40
* powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500York Sun2012-10-22-1/+36
* powerpc/mpc85xx: Introduce new macros to add and delete TLB entriesYork Sun2012-10-22-179/+130
* powerpc/85xx: clear out TLB on bootScott Wood2012-08-23-33/+43
* powerpc/fsl-corenet: work around erratum A004510Scott Wood2012-08-23-0/+284
* mpc85xx: Initial SP alignment is wrong.Joakim Tjernlund2012-08-22-11/+5
* powerpc/85xx:Fix NAND code base to support debuggerPrabhakar Kushwaha2012-07-06-1/+1
* powerpc/85xx:Make debug exception vector accessiblePrabhakar Kushwaha2012-07-06-5/+78
* powerpc/85xx:Fix MSR[DE] bit in MSR to support debuggerPrabhakar Kushwaha2012-07-06-2/+5
* powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSRTimur Tabi2012-04-24-2/+6
* powerpc/85xx:Avoid vector table compilation for nand_splPrabhakar Kushwaha2012-04-24-0/+6
* powerpc/85xx:Fix IVORs addr after vector table relocationPrabhakar Kushwaha2012-04-24-0/+33
* powerpc/85xx:Avoid hardcoded vector address for IVORsPrabhakar Kushwaha2012-04-24-31/+34
* powerpc/85xx: Add workaround for erratum CPU-A003999Kumar Gala2011-11-29-0/+6
* powerpc/85xx: resize the boot page TLB before relocating CCSRTimur Tabi2011-11-08-0/+49
* powerpc/85xx: verify the current address of CCSR before relocating itTimur Tabi2011-11-08-0/+27
* powerpc/85xx: add some missing sync instructions in the CCSR relocation codeTimur Tabi2011-11-08-0/+4
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