Commit message (Expand) | Author | Age | Lines | |
---|---|---|---|---|
* | MIPS: Split I & D cache line size config | Paul Burton | 2016-05-31 | -2/+2 |
* | MIPS: Move cache sizes to Kconfig | Paul Burton | 2016-05-31 | -3/+3 |
* | MIPS: Use unchecked immediate addition/subtraction | Paul Burton | 2016-05-21 | -1/+1 |
* | MIPS: sync processor and register definitions with linux-4.4 | Daniel Schwierzeck | 2016-01-16 | -8/+8 |
* | MIPS: clear TagLo select 2 during cache init | Paul Burton | 2015-01-29 | -2/+8 |
* | MIPS: allow systems to skip loads during cache init | Paul Burton | 2015-01-29 | -6/+13 |
* | MIPS: inline mips_init_[id]cache functions | Paul Burton | 2015-01-29 | -58/+28 |
* | MIPS: refactor cache loops to a macro | Paul Burton | 2015-01-29 | -17/+13 |
* | MIPS: refactor L1 cache config reads to a macro | Paul Burton | 2015-01-29 | -56/+41 |
* | MIPS: unify cache initialization code | Paul Burton | 2015-01-29 | -0/+277 |