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* ARM: Move SYS_CACHELINE_SIZE over to KconfigTom Rini2016-08-26-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all cases we are mirroring the values used by the Linux Kernel here. Also, so long as (and in this case, it is true) we implement flushes in hunks that are no larger than the smallest implementation (and given that we mirror the Linux Kernel, again we are fine) it is OK to align higher. The biggest changes here are that we always use 64 bytes for CPU_V7 even if for example the underlying core is only 32 bytes (this mirrors Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the Linux Kernel) as we do not need multi-platform support (to this degree) and only the Cavium ThunderX 88xx series has a use for such large alignment. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Stefan Roese <sr@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefan Agner <stefan.agner@toradex.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Peter Griffin <peter.griffin@linaro.org> Acked-by: Paul Kocialkowski <contact@paulk.fr> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: "Pali Rohár" <pali.rohar@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Thomas Weber <weber@corscience.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: David Feng <fenghua@phytium.com.cn> Cc: Alison Wang <b18965@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Saksham Jain <saksham.jain@nxp.com> Cc: Qianyu Gong <qianyu.gong@nxp.com> Cc: Wang Dongsheng <dongsheng.wang@nxp.com> Cc: Alex Porosanu <alexandru.porosanu@freescale.com> Cc: Hongbo Zhang <hongbo.zhang@nxp.com> Cc: tang yuantian <Yuantian.Tang@freescale.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Anand Moon <linux.amoon@gmail.com> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Carlo Caione <carlo@endlessm.com> Cc: huang lin <hl@rock-chips.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Xu Ziyuan <xzy.xu@rock-chips.com> Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com> Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Alexander Graf <agraf@suse.de> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: "Andrew F. Davis" <afd@ti.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Carlos Hernandez <ceh@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Daniel Allred <d-allred@ti.com> Cc: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Chin Liang See <clsee@altera.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Paul Kocialkowski <contact@paulk.fr>
* arm: mvebu: a38x: typo fix cpabilities -> capbilitiesChris Packham2016-08-26-1/+1
| | | | | Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: a38x: update serdes error handlingChris Packham2016-08-26-19/+20
| | | | | | | | | Ensure appropriate error messages are generated. Previously all errors indicated that the serdes was already in use. Now appropriate error messages are given. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Add support for NAND interface on A-38xChris Packham2016-08-26-1/+10
| | | | | | | | | | | The NAND interface on the Armada-38x series is similar to that on the Armada-XP. The key difference is that the NAND ECC clock ratio is provided via the DFX Server registers instead of the Core Clock. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* common: Pass the boot device into spl_boot_mode()Marek Vasut2016-06-26-1/+1
| | | | | | | | | | | | | | | | | | The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org>
* configs: Re-sync with cmd/KconfigTom Rini2016-04-25-1/+0
| | | | | | | Update the config.h and defconfig files for the commands that 8e3c036 converted over to Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: mvebu: Add base address for 2nd I2C controllerStefan Roese2016-04-12-0/+1
| | | | | | | Add MVEBU_TWSI1_BASE define so that the 2nd I2C controller on e.g. AXP can be used. Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Don't enable d-cache on A375Stefan Roese2016-04-04-2/+9
| | | | | | | | Armada 375 still has some problems with d-cache enabled in the ethernet driver (mvpp2). So lets keep the d-cache disabled until this is solved. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Add basic support for Armada 375 eval board db-88f6720Stefan Roese2016-04-04-1/+11
| | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the Marvell A375 eval board. Tested are the following interfaces: - I2C - SPI - SPI NOR - Ethernet (mvpp2), port 0 & 1 Currently the A375 SerDes and DDR3 init code is not intergrated. So the SPL U-Boot is not fully functional. Right now, this A375 mainline U-Boot can only be used by chainloading it via the original Marvell U-Boot. This can be done via this command: => tftpboot 00800000 a375/u-boot-dtb.bin;go 00800000 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Add basic support for the Marvell Armada 375 SoCStefan Roese2016-04-04-5/+92
| | | | | | | | | | | | | | | This patch adds basic support for the Armada 375. Please note that currently the SerDes and DDR3 init code for the A375 is not included / enabled. This will be done in a later, follow-up patch. Right now, this A375 mainline U-Boot can only be used by chainloading it via the original Marvell U-Boot. This can be done via this command: => tftpboot 00800000 a375/u-boot-dtb.bin;go 00800000 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Add some SPI CS attributesStefan Roese2016-03-24-0/+3
| | | | | | | | | | These attribute defines may be used to map an area of memory for direct access to the specific SPI devices. See SPI Direct Access Mode for further information. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Add support for the Armada XP theadorable boardStefan Roese2016-01-27-0/+6
| | | | | | | | | | | | | | | | | | | This patch adds support for the Armada XP (MV78260) based theadorable board. Its equipped with onboard DDR3, UART, ethernet, I2C, SPI NOR, LCD and SATA (SSD) interfaces / devices. Two defconfigs are added: theadorable_defconfig: The production U-Boot version with a stripped down drivers and feature list. This removes networking, USB and PCI support. theadorable_debug_defconfig: The debugging / testing U-Boot version with full support for all drivers. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Signed-off-by: Stefan Roese <sr@denx.de>
* video: Add support for Armada XP LCD controllerStefan Roese2016-01-23-0/+14
| | | | | | | | | | | | | | This patch adds basic support for the LCD controller of the Marvell Armada XP SoC. An AXP based custom board port will be added later, to use this driver to display a splash screen via the bmp command later. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> [agust: rebased] Signed-off-by: Anatolij Gustschin <agust@denx.de>
* mvebu: Support Synology DS414Phil Sutter2016-01-14-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the MV78230 based DS414 NAS by Synology. The relevant bits have been extracted from the 'synogpl-5004-armadaxp' package Synology kindly published, garnished with a fair amount of trial-and-error. Sadly, support is far from perfect. The major parts I have failed in are SATA and XHCI support. Details about these and some other things follow: Device Tree ----------- The device tree file armada-xp-synology-ds414.dts has been copied from Linux and enhanced by recent U-Boot specific changes to armada-xp-gp.dts. SATA Support ------------ There is a Marvell 88SX7042 controller attached to PCIe which is supported by Linux's sata_mv driver but sadly not U-Boot's sata_mv. I'm not sure if extending the latter to support PCI devices is worth the effort at all. Porting sata_mv from Linux exceeded my brain's capacities. :( XHCI Support ------------ There is an EtronTech EJ168A XHCI controller attached to PCIe which drives the two rear USB3 ports. After a bit of playing around I managed to get it recognized by xhci-pci, but never was able to access any devices attached to it. Enabling it in ds414 board config shows that it does not respond to commands for whatever reason. The (somewhat) bright side to it is that it is not even supported in Synology's customized U-Boot, but that also means nowhere to steal the relevant bits from. EHCI Support ------------ This seems functional after issuing 'usb start'. At least it detects USB storage devices, and IIRC reading from them was OK. OTOH Linux fails to register the controller if 'usb start' wasn't given before in U-Boot. According to Synology sources, this board seems to support USB device (gadget?) mode. Though I didn't play around with it. PCIe Support ------------ This is fine, but trying to gate the clocks of unused lanes will hang PCI enum. In addition to that, pci_mvebu seems not to support DM_PCI. DDR3 Training ------------- Marvell/Synology uses eight PUPs instead of four. Does not look like this is meant to be customized in mainline U-Boot at all. OTOH I have no idea what a "PUP" actually is. PEX Init -------- Synology uses different values than mainline U-Boot with this patch: pex_max_unit_get returns 2, pex_max_if_get returns 7 and max_serdes_lines is set to 7. Not changing this seems to not have an impact, although I'm not entirely sure it does not cause issues I am not aware of. Static Environment ------------------ This allows to boot stock Synology firmware at least. In order to be a little more flexible when it comes to booting custom kernels, do not only load zImage partition, but also rd.gz into memory. This way it is possible to use about 7MB for kernel with piggyback initramfs. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* mvebu: Add rudimental MV78230 supportPhil Sutter2016-01-14-6/+17
| | | | | | | | | This adds basic support for Marvell's MV78230 SoC which belongs to the Armada XP series. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* mvebu: Introduce kconfig symbols for SoC variantsPhil Sutter2016-01-14-4/+20
| | | | | | | | | This patch adds intermediate kconfig symbols which select their SoC family. Boards then select them instead of the family symbol directly. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* mvebu: axp: refactor board_sat_r_get() and callerPhil Sutter2016-01-14-31/+15
| | | | | | | | | | | | | Instead of calling board_sat_r_get() only for those boards providing the satr11 value via I2C, call it for all boards and return static values for those not using I2C. In addition to that, make this a weak function to allow for board code to override it. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* drivers/pci/pci_mvebu: Fix for boards with X4 lanesPhil Sutter2016-01-14-0/+2
| | | | | | | | | | | | | | | | | Armada XP has support for X4 lanes, boards specify this in their serdes_cfg. During PEX init in high_speed_env_lib.c, the configuration is stored in GEN_PURP_RES_2_REG. When enumerating PEX, subsequent interfaces of an X4 lane must be skipped. Otherwise the enumeration hangs up the board. The way this is implemented here is not exactly beautiful, but it mimics how Marvell's BSP does it. Alternatively we could get the information using board_serdes_cfg_get(), but that won't lead to clean code, either. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: mvebu: Add runtime detection of UART (xmodem) boot-modeStefan Roese2016-01-14-20/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds runtime detection of the Marvell UART boot-mode (xmodem protocol). If this boot-mode is detected, SPL will return to the BootROM to continue the UART booting. With this patch its now possible, to generate a U-Boot image that can be booted either from the strapped boot-device (e.g. SPI NOR, MMC, etc) or via the xmodem protocol from the UART. In the UART case, the kwboot tool will dynamically insert the UART boot-device type into the image. And also patch the load address in the header, so that the mkimage header will be skipped (as its not expected by the Marvell BootROM). This simplifies the development for Armada XP / 38x based boards. As no special images need to be generated by selecting the MVEBU_BOOTROM_UARTBOOT Kconfig option. Since the Kconfig option MVEBU_BOOTROM_UARTBOOT is not needed any more, its now completely removed. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
* arm: mvebu: Add runtime boot-device detectionStefan Roese2016-01-14-7/+39
| | | | | | | | | | This patch adds runtime boot-device detection to SPL U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
* arm: mvebu: Make local structs static constStefan Roese2016-01-14-2/+2
| | | | | | | | | | As these structs are local only and const, declare them accordingly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
* arm: mvebu: Move SAR register defines into headerStefan Roese2016-01-14-16/+24
| | | | | | | | | | This is preparation for the runtime bootmode detection in spl.c. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
* arm: mvebu: Move SoC selection (A38X vs AXP) into KconfigStefan Roese2016-01-14-14/+25
| | | | | | | | | | | | | | | | | | Until now, the SoC selection for the ARCH_MVEBU platforms has been done in the config header. Using CONFIG_ARMADA_XP in a non-clear way. As it needed to get selected for AXP and A38x based boards. This patch now changes this to move the SoC selection to Kconfig. And also uses CONFIG_ARCH_MVEBU as a common define for both AXP and A38x. This makes things a bit clearer - especially for new board additions. Additionally the defines CONFIG_SYS_MVEBU_DDR_AXP and CONFIG_SYS_MVEBU_DDR_A38X are replaced with the already available CONFIG_ARMADA_38X and CONFIG_ARMADA_XP. And CONFIG_DDR3 is removed, as its not referenced anywhere. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Consolidate board Kconfig options into one fileStefan Roese2016-01-14-0/+17
| | | | | | | | Merging all the board specific Kconfig options into the main Kconfig file for mach-mvebu makes things easier to maintain. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Print CPU and SDRAM frequency upon startupStefan Roese2016-01-14-8/+113
| | | | | | | | | | | | | | | With this patch, the CPU and the DDR frequencies will get printed in the U-Boot startup messages. Resulting in such a log: U-Boot 2016.01-rc2-00188-gb8eeaec-dirty (Dec 21 2015 - 12:32:35 +0100) SoC: MV78460-B0 at 1600 MHz I2C: ready DRAM: 4 GiB (800 MHz, ECC not enabled) ... Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Make serdes setup on Armada XP less noisyStefan Roese2016-01-14-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change some of the PEX configuration output lines from always output to only ouput upon specific debug enabling. This changes the SPL output from: U-Boot SPL 2016.01-rc2-00037-g9353a7f (Dec 10 2015 - 10:27:42) High speed PHY - Version: 2.1.5 (COM-PHY-V20) Update Device ID PEX0782611ab Update Device ID PEX1782611ab Update Device ID PEX2782611ab Update Device ID PEX3782611ab Update Device ID PEX8782611ab Update PEX Device ID 0x78260 High speed PHY - Ended Successfully DDR3 Training Sequence - Ver 5.7.4 DDR3 Training Sequence - Ended Successfully to: U-Boot SPL 2016.01-rc2-00037-g9353a7f-dirty (Dec 10 2015 - 10:32:04) High speed PHY - Version: 2.1.5 (COM-PHY-V20) High speed PHY - Ended Successfully DDR3 Training Sequence - Ver 5.7.4 DDR3 Training Sequence - Ended Successfully Resulting in a little faster bootup time. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Don't include "netdev.h" in cpu.cStefan Roese2016-01-14-1/+0
| | | | | | | | | This is not needed any more since the switch to DM / DTS network initialization on MVEBU. Lets remove it, as it otherwise leads to compilation warning when CONFIG_NET is not enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Add support for MV78260Stefan Roese2016-01-14-5/+29
| | | | | | | | | | This patch adds support for the dual core Armada XP variant, the MV78260. It has some minor differences to the 4-core MV78460, e.g. only 12 serdes lanes. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Phil Sutter <phil@nwl.cc>
* arm: mvebu: Don't use 0 as board ID as its used for the custom boardsStefan Roese2016-01-14-1/+1
| | | | | | | | | Using board ID 0 is reserved for the non-Marvell "custom" boards. So move the board ID's to reflect this. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Phil Sutter <phil@nwl.cc>
* arm: mvebu: Simplify code in setup_usb_phys() a bitStefan Roese2016-01-14-5/+5
| | | | | | | | Use the clrbits() / setbits() functions instead of clrsetbits() when bit are only cleared or set. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Don't disable cache at startup on Armada XP at allStefan Roese2016-01-14-12/+13
| | | | | | | | | | This patch leaces the cache configuration untouched for the AXP in the setup done by the BootROM. Resulting in the cache still being enabled at the startup of U-Boot. This leads to a slightly faster boot to the U-Boot prompt (or Linux of course). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Don't call arch_cpu_init() from SPL at allStefan Roese2016-01-14-21/+8
| | | | | | | | | | | | | | This patch removes the call to arch_cpu_init() in the SPL U-Boot version. As SPL does not need all the configuration done in this function. And also does not need the reconfiguration of the internal register address to 0xf1000000. This will be done by the main U-Boot later on. This also fixes a problem with the timer not beeing initialized on AXP, as needed for the mdelay in the setup_usb_phys(). This will now only be called once in main U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Add v7_outer_cache_disable function for AXP & A38xStefan Roese2016-01-14-0/+8
| | | | | | | | | | | | Add functionality to correctly disable the L2 cache on the Armada XP and 38x platforms. Without this, booting into Linux on ClearFog (A38x) results in a hangup without any output on the serial console at all. Even with earlyprintk enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Enable L2 cache on Armada XPStefan Roese2016-01-14-9/+25
| | | | | | | | | | | | | | | | | | Until now, the L2 cache was never enabled again in U-Boot. To get even better performance (bootup time), lets enable the L2 cache in U-Boot. This code was taken from the Linux kernel. A performance gain was measured on the DB-MV784MP-GP board by testing with tftpboot and sata commands. This patch also cleans up the L2 cache related code. And makes sure that the L2 cache is only disabled once. Please note that A38x still runs with L2 cache disabled. And needs to be enabled for this SoC in a separate patch if needed or desired. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Add SolidRun ClearFog Armada 38x initial supportStefan Roese2016-01-14-0/+3
| | | | | | | | | | | | | | | | | | | | This patch adds basic support for the SolidRun ClearFog Armada 38x based board to mainline U-Boot. Supported interfaces / devices are: - DDR3 - UART - MMC - Ethernet port 0 (connected to dedicated PHY) - I2C The included DT source was taken from Russell King's ftp server: http://www.home.arm.linux.org.uk/~rmk/clearfog/ With only minor modifications, like the addition of some aliases and the "u-boot,dm-pre-reloc" property. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Move some defines to common include fileStefan Roese2016-01-14-0/+6
| | | | | | | | | This patch moves some config options to the mvebu common include file. Making it easier to not forget these defines for new boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
* net: mvneta: Convert to driver modelStefan Roese2016-01-14-28/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update this driver to support driver model. As all MVEBU boards using this driver are converted with this patch, the non-driver-model code can be removed completely. This is also the reason why this patch is quite big and includes a) the driver change and b) the platform change. As its not git-bisect save otherwise. With this conversion, some parameters are now extracted from the DT instread of using the config header defines. The supported properties right now are: PHY-mode ("phy-mode") and PHY-address ("reg"). The base addresses for the ethernet controllers can be removed from the header files as well. Please note that this patch also removes the E1000 network driver from some MVEBU config headers. This is necessary, as with DM_ETH configured and the e1000 driver enabled, the PCI driver also needs to support DM. But the MVEBU PCI(e) driver still needs to get ported to DM. When this is done, the E1000 driver can be enabled again. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org>
* arm: mvebu: Add SPI driver model supportStefan Roese2016-01-14-3/+4
| | | | | | | | | | | | This patch enables the DM support for the SPI driver and the SPI NOR flash chips. Some MVEBU boards boot from SPI NOR, so adding the aliases and enabling CONFIG_DM_SEQ_ALIAS is needed here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Simon Glass <sjg@chromium.org>
* arm: mvebu: Add DM and OF_CONTROL support to SPLStefan Roese2016-01-14-65/+27
| | | | | | | | | | | | | | | | | | | | | | This patch adds full DM support to the SPL on MVEBU. Currently only serial is supported. Other drivers will follow. This patch also adds the necessary config values for the DEBUG UART to the MVEBU defconfig files. This came in handy while implementing this DM support. Additionally, the mvebu specific SPL linker script is removed and this common one is used instead: arch/arm/cpu/u-boot-spl.lds This common linker script already handles all special cases. No need to reinvent the wheel for MVEBU here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Simon Glass <sjg@chromium.org>
* arm: mvebu/kirkwood: Use common timer functionsStefan Roese2016-01-14-124/+17
| | | | | | | | | | By using the common timer functions for mvebu/kirkwood we can get rid of quite a lot of code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Simon Guinot <simon.guinot@sequanux.org> Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
* arm: mvebu: Configure ARP timeout and retry countStefan Roese2015-11-29-0/+2
| | | | | | | | | | As some MVEBU platforms using the MVNETA driver seem to miss the first ARP packet, lets reduce the timeout and increase the retry count. This increases the speed for communication establishment. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de>
* arm: mvebu: a38x: serdes specification cleanupKevin Smith2015-11-17-52/+48
| | | | | | | | | | | | Instead of allocating space in the driver for the serdes specification table, just allow the board file to set a pointer to it. Also, allow the board to only specify the lanes that are used instead of including unused lanes. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: a38x: Add const to some function callsKevin Smith2015-11-17-7/+7
| | | | | | | | | | Functions that do not modify the pointer passed should declare it as const. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: a38x: Remove unsupported topologiesKevin Smith2015-11-17-1315/+0
| | | | | | | | | | | | | | A lot of extra configuration information was left over in the Marvell serdes and DDR3 initialization code for boards that U-boot does not support. Remove this extra config information, and the concept of fixing up board topologies with information loaded from an EEPROM. If this needs to be done, it should be handled in the board file, not in core code. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* compat: Remove is_power_of_2() definitionFabio Estevam2015-11-05-1/+1
| | | | | | | | | | Use the is_power_of_2() definition from log2.h to align with the kernel implementation. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>
* arm: mvebu: Add DM (driver model) supportStefan Roese2015-10-21-3/+0
| | | | | | | | | | | | | | | | This patch adds driver model support for some Marvell MVEBU SoC's. Including Armada XP and 38x. All 3 currently mainlined boards are converted. DM is now selected automatically for MVEBU platforms. With this DM support now available for MVEBU, hardcoding the base addresses and other information is not necessary any more. Probing should be done by using the values provided via the device tree now instead. For this the driver also need to be converted to DM. Patches for some of the drivers will follow. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Do not call board_init_r() from board_init_f()Stefan Roese2015-10-21-2/+0
| | | | | | | | | | | | | Instead of calling board_init_r() directly from board_init_f(), just return from board_init_f(). This will make the code continue executing in crt0.S _main(), from which the board_init_r() is called. This patch aligns the MVEBU SPL with the correct SPL design as well as reduces the stack utilisation slightly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Only set CONFIG_SKIP_LOWLEVEL_INIT for SPLStefan Roese2015-10-21-12/+19
| | | | | | | | | When running on the AXP I sometimes noticed a strange behavior. As some characters are not echoed on the U-Boot prompt. Not disabling the lowlevel_init code, especially calling cpu_init_cp15() in the main U-Boot seems to solve this issue. Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Add option to use UART xmodem protocol via kwbootStefan Roese2015-10-21-1/+54
| | | | | | | | | | | | | | | | | | | | | | This patch enables the use of the kwboot tool, to boot mainline U-Boot on the Marvell Armada XP/38x SoC's. This is done by returning to the SoC's BootROM after SPL has initialized the SDRAM. We need to make sure to not reconfigure the internal register space and MBARs. Otherwise the BootROM will not be able to continue after SPL jumps back to it. To use this feature, please don't forget to change the BOOT_FROM line in your board specfic kwbimage.cfg file this way: BOOT_FROM uart Tested on these Marvell eval boards: DB-MV784MP-GP - Armada XP DB-88F6820-GP - Armada 38x Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Move Armada XP/38x Kconfig to mach specific Kconfig fileStefan Roese2015-10-20-0/+21
| | | | | | Introduce a mach-mvebu/Kconfig for all Armada based SoC's. Signed-off-by: Stefan Roese <sr@denx.de>
generated by cgit v1.1 at 2024-11-09 05:30:57 +0000