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| * | | arm: mxs: Add LCDIF registers for i.MX233Marek Vasut2013-05-06-9/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extend the regs-lcdif.h with registers for i.MX233. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| * | | arm: mxs: Add LCDIF clock configuration functionMarek Vasut2013-05-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function turns on the LCDIF clock and configures it's frequency. The dividers settings are calculated within the function and the current implementation should be fast and accurate. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| * | | imx: mx5: Remove legacy iomux supportBenoît Thébaudeau2013-05-05-970/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Legacy iomux support is no longer needed now that all boards have been converted to iomux-v3. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Reviewed-by: Marek Vasut <marex@denx.de>
| * | | imx: iomux-v3: Add iomux-mx53.hBenoît Thébaudeau2013-05-05-0/+1232
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow usage of the imx-common/iomux-v3.h framework by including pad settings for the i.MX53. The content of the file is taken from Freescale's Linux kernel at commit 4ab3715, plus the required changes to make it work in U-Boot. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: iomux-v3: Add missing definitions to iomux-mx51.hBenoît Thébaudeau2013-05-05-27/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing definitions that are required by future changes. By the way, make some cosmetic cleanup. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: iomux-mx51: Fix MX51_PAD_EIM_CS2__GPIO2_27Benoît Thébaudeau2013-05-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In ALT1 mode, EIM_CS2 is GPIO2[27], not ESDHC1.CD. Hence, rename MX51_PAD_EIM_CS2__SD1_CD to MX51_PAD_EIM_CS2__GPIO2_27. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: mx35: Remove legacy iomux supportBenoît Thébaudeau2013-05-05-649/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Legacy iomux support is no longer needed now that all boards have been converted to iomux-v3. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: iomux-v3: Add iomux-mx35.hBenoît Thébaudeau2013-05-05-0/+1276
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow usage of the imx-common/iomux-v3.h framework by including pad settings for the i.MX35. The content of the file is taken from Linux kernel at commit 267dd34, plus the required changes to make it work in U-Boot. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: mx25: Remove legacy iomux supportBenoît Thébaudeau2013-05-05-453/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Legacy iomux support is no longer needed now that all boards have been converted to iomux-v3. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: iomux-v3: Add iomux-mx25.hBenoît Thébaudeau2013-05-05-0/+546
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow usage of the imx-common/iomux-v3.h framework by including pad settings for the i.MX25. The content of the file is taken from Linux kernel at commit 267dd34, plus the required changes to make it work in U-Boot. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | arm: mx5: Add NAND clock handlingMarek Vasut2013-05-05-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Augment the MX5 clock code with function to enable and configure NFC clock. This is necessary to get NFC working on MX5. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
| * | | arm: mx5: Add SPL support code to MX5Marek Vasut2013-05-05-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix minor adjustments needed to get SPL framework building on MX5. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
| * | | mx23: Fix pad voltage selection bitFabio Estevam2013-05-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On mx23 the pad voltage selection bit needs to be always '0', since '1' is a reserved value. For example: Pin 108, EMI_A06 pin voltage selection: 0= 1.8V (mDDR) or 2.5V (DDR1); 1= reserved. Fix the pad voltage definitions for the mx23 case. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | tools: arm: imx: Implement BOOT_OFFSET command for imximageMarek Vasut2013-04-28-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement BOOT_OFFSET command for imximage. This command is parallel to current BOOT_FROM command, but allows more flexibility in configuring arbitrary image header offset. Also add an imximage.cfg with default offset values into arm/arch/imx-common/ so the board-specific imximage.cfg can include this file to avoid magic constants. The syntax of BOOT_OFFSET command is "BOOT_OFFSET <u32 offset>". Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Stefan Roese <sr@denx.de>
| * | | imx: iomux-v3: Include PKE and PUE to pad control pull definitionsBenoît Thébaudeau2013-04-28-11/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PUE requires PKE to mean something, as do pull values with PUE, so do not compell users to explicitly use PKE and PUE everywhere. This is also what is done on Linux and what has already been done for i.MX51. By the way, remove some unused pad control definitions. There is no change of behavior. Note that SPI_PAD_CTRL was defined by several boards with a pull value, but without PKE or PUE, which means that no pull was actually enabled in the pad. This might be a bug in those boards, but this patch does not change the behavior, so it just removes the meaningless pull value from those definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: iomux-v3: Restore Linux's NEW_PAD_CTRL() macroBenoît Thébaudeau2013-04-28-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | This macro will be useful for future changes. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: iomux-v3: cosmetic: Reorganize definitionsBenoît Thébaudeau2013-04-28-14/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Keep pad control definitions together, and organize definitions in a more legible way. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: iomux-v3: Fix common pad control definitionsBenoît Thébaudeau2013-04-28-23/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit dc88403 "iomux-v3: Place pad control definitions into common file" broke mx51_efikamx because it made i.MX6's pad control definitions conflict with i.MX51's. i.MX51's pad control definitions are actually common to some other i.MX (25/35/53), so move them to the common iomux-v3.h (just like what is done in Linux's), and select the correct definitions depending on whether CONFIG_MX6 is defined or not. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | Add mxc_ocotp driverBenoît Thébaudeau2013-04-28-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add an mxc_ocotp driver for i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | Add fsl_iim driverBenoît Thébaudeau2013-04-28-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add a fsl_iim driver common to i.MX and MPC. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: Add useful fuse definitionsBenoît Thébaudeau2013-04-28-3/+61
| | | | | | | | | | | | | | | | | | | | | | | | Define the UID (SoC unique ID) fuses, and the fuses available for the user. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: Homogenize and fix fuse register definitionsBenoît Thébaudeau2013-04-28-19/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IIM: - Homogenize prg_p naming (the reference manuals are not always self-consistent for that). - Add missing SCSx and bank registers. - Fix the number of banks on i.MX53. OCOTP: - Rename iim to ocotp in order to avoid confusion. - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the reference manual. - Merge the existing spinoff gp1 fuse definition on i.MX6. - Fix the number of banks on i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | mx53ard: Move register masks into imx-regs.hFabio Estevam2013-04-25-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | imx-regs.h is more appropriate location for containing register masks. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | wandboard: Add support for Carrier Board MicroSD cardOtavio Salvador2013-04-25-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow use of the carrier board MicroSD card available in the Wandboard; this allow for loading alternative system from the other card for testing or upgrade proposes. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | wandboard: Add card detection for SOM MicroSD cardOtavio Salvador2013-04-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This add support to identify if the card is connected or not; so it does not try to communicate with the controller if no card is available. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | nitrogen6x: Setup CCM_CCOSR registerFabio Estevam2013-04-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CKO1 drives sgtl5000 codec clock on nitrogen boards and wandboard. Doing this setup in the bootloader will allow us to remove a lot of code in arch/arm/mach-imx/mach-imx6q.c from the mainline kernel. Also, according to Eric Nelson: "enabling the clock <in the bootloader> will remove squeal after an ungraceful reboot (watchdog) if hooked up to speakers." Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx35 iomux: correct input select register indexPhilip Paeps2013-04-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prior to this fix, calls to mxc_iomux_set_input() for registers after MUX_IN_GPIO2_IN_19 would write to the wrong registers, possibly resulting in unexpected behaviour. Signed-off-by: Philip Paeps <philip@paeps.cx>
| * | | arm: imx: Codingstyle enhancement of include/asm/arch-mx6/crm_regs.hStefan Roese2013-04-25-86/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add spaces before and after "<<". Please note that I intentionally didn't wrap the > 80 lines for the sake of better readability. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | imx: Add titanium board support (i.MX6 based)Stefan Roese2013-04-22-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Titanium is a i.MX6 based board from ProjectionDesign / Barco. This patch adds support for this board with the newly introduced NAND support for i.MX6. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mtd: mxs_nand: Add support for i.MX6Stefan Roese2013-04-22-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * | | dma: Add i.MX6 support to drivers/dma/apbh_dma.cStefan Roese2013-04-22-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will be used by the i.MX6 NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * | | imx: Move some i.MX common functions into the imx-common directoryStefan Roese2013-04-22-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves the following functions into the imx-common directory: - mxs_wait_mask_set() - mxs_wait_mask_clr() - mxs_reset_block() These are currently used by i.MX28. But the upcoming GPMI NAND port for i.MX6 will also use these functions. So lets move them to a common location to re-use them. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * | | imx: Move some header files from arch-mxs to imx-commonStefan Roese2013-04-22-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following headers are moved to a i.MX common location: - regs-common.h - regs-apbh.h - regs-bch.h - regs-gpmi.h - dma.h This way this header can be re-used also by other i.MX platforms. For example the i.MX6 which will need it for the upcoming NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx6: Add solo-lite variant supportFabio Estevam2013-04-22-1/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx6 solo-lite is another member of the mx6 series. For more information about mx6 solo-lite, please visit: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6SL&nodeId=018rH3ZrDRB24A Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | iomux-v3: Place pad control definitions into common fileFabio Estevam2013-04-22-55/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of having the same PAD control definition in each MX6 variant pin file, place it into a common location. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | Merge branch 'next'Stefano Babic2013-04-21-2/+2
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| | * | arm: imx: Change iomux functions to void typeStefan Roese2013-04-16-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | They never return anything also than 0, so lets change the function to void instead. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
* | | | Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-11-11/+0
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| * | | | pxa27x_udc: remove call to unimplemented set_GPIO_mode()Mike Dunn2013-05-05-11/+0
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_USB_DEV_PULLUP_GPIO is defined, a link error occurs because the set_GPIO_mode() helper function is not implemented. This function doesn't do much except make the code a little more readable, so I just manually coded its equivalent and removed the prototype from the header file. It is invoked no where else in the code. While I was at it, I noticed that two other function prototypes in the same header file are also neither implemented nor invoked anywhere, so I removed them as well. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
* | | | fpga: zynq: Add support for loading bitstreamMichal Simek2013-05-06-2/+11
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Devcfg device requires to load bitstream in binary format. But u-boot also has an option for loading bitstream in bit format. Let's handle both cases by zynqpl driver. Also add suport for loading partial bitstreams. The first driver version was done by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | i2c: zynq: Add support for Xilinx ZynqMichal Simek2013-04-30-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Support Xilinx Zynq i2c controller. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@ti.com>
* | | mmc: Add support for Xilinx Zynq sdhci controllerMichal Simek2013-04-30-0/+5
| | | | | | | | | | | | | | | | | | | | | Add support for SD, MMC and eMMC card on Xilinx Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | zynq: Move macros to hardware.hMichal Simek2013-04-30-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add all fixed addresses to hardware.h and change petalinux configuration to support this. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | net: gem: Fix gem driver on 1Gbps LANMichal Simek2013-04-30-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The whole driver used 100Mbps because of zc702 rev B. Fix problem with not setup proper clock for gem1. This is generic approach for clk setup. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | zynq: Move scutimer baseaddr to hardware.hMichal Simek2013-04-30-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Move baseaddr to hardware.h to be shared between configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | arm: zynq: Rename XPSS_ prefix to ZYNQ_ for hardcoded SoC addressesMichal Simek2013-04-30-6/+6
|/ / | | | | | | | | | | | | | | XPSS prefix was used in past and it is obsolete for quite some time. Let's use correct SoC name which is Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | Tegra: Split tegra_get_chip_type() into soc & sku funcsTom Warren2013-04-15-2/+18
| | | | | | | | | | | | | | | | | | | | | | As suggested by Stephen Warren, use tegra_get_chip() to return the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true function, i.e. tegra_get_chip_sku(), which returns an ID like TEGRA_SOC_T25, TEGRA_SOC_T33, etc. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra114: Initialize System Counter (TSC) with osc frequencyTom Warren2013-04-15-0/+39
| | | | | | | | | | | | | | | | | | T114 needs the SYSCTR0 counter initialized so the TSC can be read by the kernel. Do it in the bootloader since it's a write-once deal (secure/non-secure mode dependent). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra: Configure L2 cache control reg properly.Tom Warren2013-04-15-0/+1
| | | | | | | | | | | | | | | | | | | | Without this change, kernel fails at calling function cache_clean_flush during kernel early boot. Aprocryphally, intended for T114 only, so I check for a T114 SoC. Works (i.e. dalmore 3.8 kernel now starts printing to console). Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: support T33 SKU of Tegra30Stephen Warren2013-04-15-0/+1
|/ | | | | | | | | | | | | | | | | | | Make U-Boot aware of the T33 SKU of Tegra30, and treat it identically to any other Tegra30. An alternative would be to simply remove the SKU checking from tegra_get_chip_type(); most use of the value most likely simply wants to know the current chip, not the specific SKU. Or, the function could be split into separate tegra_get_chip() and tegra_get_sku() for the cases where differentiation really is required. I wonder whether tegra_get_chip_type() should printf() whenever any unkown chip/SKU is found, although perhaps the function is called so early that the printf() wouldn't actually make it to the UART anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
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