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authorTom Warren <twarren@nvidia.com>2013-03-25 16:22:26 -0700
committerTom Warren <twarren@nvidia.com>2013-04-15 11:01:38 -0700
commitd0edce4fa394325a0ccfd38a5d668fb5ee1af34d (patch)
tree5a7ea0c182d9b2c33699fcfff230f83ba7b4ff84 /arch/arm/include/asm
parent85434f9d7123c283b2233614178e7cfc968d329b (diff)
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Tegra: Configure L2 cache control reg properly.
Without this change, kernel fails at calling function cache_clean_flush during kernel early boot. Aprocryphally, intended for T114 only, so I check for a T114 SoC. Works (i.e. dalmore 3.8 kernel now starts printing to console). Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/arch-tegra/ap.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra/ap.h b/arch/arm/include/asm/arch-tegra/ap.h
index 73dfd39..5999f55 100644
--- a/arch/arm/include/asm/arch-tegra/ap.h
+++ b/arch/arm/include/asm/arch-tegra/ap.h
@@ -64,3 +64,4 @@ extern void _start(void);
* @return SOC type - see TEGRA_SOC...
*/
int tegra_get_chip_type(void);
+void config_cache(void);