Commit message (Expand) | Author | Age | Lines | |
---|---|---|---|---|
* | DMC: Exynos5: Enable update mode for DREX controller | Alim Akhtar | 2014-11-17 | -0/+1 |
* | Exynos5420: DMC: Add software read leveling | Akshay Saraswat | 2014-06-13 | -0/+3 |
* | Exynos5420: Add DDR3 initialization for 5420 | Rajeshwari Birje | 2013-12-30 | -0/+10 |
* | EXYNOS5420: Add dmc and phy_control register structure | Rajeshwari Birje | 2013-12-30 | -0/+167 |
* | Exynos5: DDR3: Add DDR3 memory setup for Exynos5250 Rev 1.0 | Rajeshwari Shinde | 2012-09-01 | -0/+65 |
* | EXYNOS: Add structure for Exynos4 DMC | Chander Kashyap | 2012-03-27 | -0/+109 |
* | ARM: EXYNOS: Add support for Exynos5 based SoCs | Chander Kashyap | 2012-02-12 | -0/+146 |