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* Add TI816X supportTENART Antoine2013-08-15-95/+452
| | | | | | Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com> [trini: Fix warnings about vtp things in emif4.c, adapt AM43XX] Signed-off-by: Tom Rini <trini@ti.com>
* Prepare for TI816X : reuse existing code from TI814XTENART Antoine2013-08-15-1/+1
| | | | | | | | Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com> [trini: Adapt for CONFIG_OMAP_COMMON changes, AM43XX] Signed-off-by: Tom Rini <trini@ti.com>
* arm, da850: enable the correct uart in arch_cpu_init()Heiko Schocher2013-08-15-0/+4
| | | | | | | | | | | in arch_cpu_init() uart2 is fix enabled, without reference the setting from CONFIG_SYS_NS16550_COM1. Use the setting from CONFIG_SYS_NS16550_COM1 for enabling the console. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Tom Rini <tom.rini@gmail.com> Cc: Christian Riesch <christian.riesch@omicron.at>
* arm/davinci/da850: add uart0_pins_rtscts and RMII_MHz_50_CLK in ↵Heiko Schocher2013-08-15-0/+6
| | | | | | | emac_pins_rmii pinmux Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
* omap: emif: Set initial DDR PHY config firstTaras Kondratiuk2013-08-15-1/+1
| | | | | | | | | Commit "OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon" (f40107345cbcd6e0d1747eda45e76c4e2a6df0db) changed sequence to set final DDR PHY config register value at the beginning. Looks like it was made by mistake and should be reverted. Signed-off-by: Taras Kondratiuk <taras@ti.com>
* ARM: omap24xx: remove remainders of dead boardMasahiro Yamada2013-08-15-193/+0
| | | | | | | Since Commit 7f5eef9 removed OMAP2420H4 support, arm1136/omap24xx has not been used at all. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* ARM: omap3: Implement dpll5 (HSUSB clk) workaround for OMAP36xx/AM/DM37xx ↵Naumann Andreas2013-08-15-1/+37
| | | | | | | | | | | | | | according to errata sprz318e. In chapter 'Advisory 2.1 USB Host Clock Drift Causes USB Spec Non-compliance in Certain Configurations' of the TI Errata it is recommended to use certain div/mult values for the DPLL5 clock setup. So far u-boot used the old 34xx values, so I added the errata recommended values specificly for 36xx init only. Also, the FSEL registers exist no longer, so removed them from init. Tested this on a AM3703 board with 19.2MHz oscillator, which previously couldnt lock the dpll5 (kernel complained). As a consequence the EHCI USB port wasnt usable in U-Boot and kernel. With this patch, kernel panics disappear and USB working fine in u-boot and kernel. Signed-off-by: Andreas Naumann <anaumann@ultratronik.de> [trini: Add extern to <asm/arch-omap3/clock.h> Signed-off-by: Tom Rini <trini@ti.com>
* ARM: AM43xx: Add build supportLokesh Vutla2013-08-15-2/+3
| | | | | | Add AM43xx support in the required places Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: OMAP: Add CONFIG_OMAP_COMMONLokesh Vutla2013-08-15-1/+1
| | | | | | | Adding a new CONFIG_OMAP_COMMON which is included by all boards that needs to build cpu/armv7/omap-common folder. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: AM43xx: clocks: Add dpll and clock dataLokesh Vutla2013-08-15-1/+116
| | | | | | Add dpll and clock data for AM43xx Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: AM33xx: Move s_init to a common placeHeiko Schocher2013-08-15-6/+62
| | | | | | | | | | | | s_init has the same outline for all the AM33xx based board. So making it generic. This also helps in addition of new Soc with minimal changes. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* ARM: AM33xx: Cleanup clocks layerLokesh Vutla2013-08-15-215/+148
| | | | | | | | | | | Cleaning up the clocks layer. This helps in addition of new Soc with minimal changes. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* ARM: AM33xx: Cleanup dplls dataLokesh Vutla2013-08-15-182/+154
| | | | | | | | | | | | | Locking sequence for all the dplls is same. In the current code same sequence is done repeatedly for each dpll. Instead have a generic function for locking dplls and pass dpll data to that function. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* am335x_evm: Add support to boot from NOR.Steve Kipisz2013-07-30-2/+6
| | | | | | | | | | | | | | | | | | NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid using SPL for this case and u-boot.bin is written directly to the start of NOR. We enclose the DMM-related parts of arch/arm/cpu/armv7/am33xx/emif4.c with TI81xx checks as at this time U-Boot does not discard unused sections in the main build and this code relies on functions specific to (and only provided in) ti81xx-related code. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* am335x_evm: Add support for the NOR module on the memory capeSteve Kipisz2013-07-30-0/+4
| | | | | | | | | | | This patch adds support for the NOR module that attaches to the memory cape for a Beaglebone board. This does not add booting support; only support so that you can boot from SD/MMC and see the NOR module so that it can be programmed. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> [trini: Clean up config changes slightly] Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Correct gpmc_cfg->irqstatus/enableTom Rini2013-07-30-2/+2
| | | | | | | | Based on our usage of the GPMC, either with NOR or NAND we do not need to be setting the irqstatus or irqenable bits and should clear them like we have historically. Signed-off-by: Tom Rini <trini@ti.com>
* ARM: DRA7xx: Add CPSW support to DRA7xx EVMMugunthan V N2013-07-26-0/+4
| | | | | | Adding support for CPSW Ethernet support found in DRA7xx EVM Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* ARM: DRA7xx: Enable GMAC clock controlMugunthan V N2013-07-26-1/+8
| | | | | | Enabling CPSW module by enabling GMAC clock control Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* ARM: DRA7xx: Lock DPLL_GMACLokesh Vutla2013-07-26-0/+30
| | | | | | | | | Locking DPLL_GMAC [mugunthanvnm@ti.com:Configure only if CPSW is selected] Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* omap3/sys_info: fix printout of OMAP36XX L3 freqencyAndreas Bießmann2013-07-26-3/+3
| | | | | | | | | The OMAP36xx/OMAP37xx family uses L3 frequency of 200MHz instead of 165MHz used by OMAP34xx/OMAP35xx. Also fix checkpatch warning about alignment. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm: omap3: spl: Fix problem with 8bit NAND devicesStefan Roese2013-07-26-0/+12
| | | | | | | | Currently in OMAP3 SPL, the GPMC for NAND is configured for 16bit access. This patch adds support for 8bit NAND devices as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com>
* Merge branch 'u-boot/master' into u-boot-arm/masterAlbert ARIBAUD2013-07-25-6059/+387
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| * Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2013-07-24-0/+7
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
| | * vf610: Add I2C support for Vybrid VF610 platformAlison Wang2013-07-23-0/+7
| | | | | | | | | | | | | | | | | | | | | This patch adds I2C support for Vybrid VF610 platform and adds I2C0 support to VF610TWR board. Signed-off-by: Alison Wang <b18965@freescale.com>
| * | Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-6059/+380
| |/ | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* | ARM: highbank: avoid bss write in timer_initRob Herring2013-07-25-2/+0
| | | | | | | | | | | | | | | | | | The timer_init function is called before relocation and writes to bss data were corrupting relocation data. Fix this by removing the call to reset_timer_masked. The initial timer count should be 0 or near 0 anyway, so initializing the variables are not needed. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | ARM: highbank: set timer prescaler to 256Rob Herring2013-07-25-2/+4
| | | | | | | | | | | | | | The 150MHz clock rate gives u-boot time functions problems and there's no benefit to a fast clock, so lower the rate. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | ARM: highbank: fix get_tbclk value to timer rateRob Herring2013-07-25-1/+1
|/ | | | | | get_tbclk should return the timer's frequency, not CONFIG_SYS_HZ. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* arm:exynos:fix: Fix clock calculation for Exynos4210 based targets.Łukasz Majewski2013-07-16-5/+4
| | | | | | | | | | | Provide proper setting for the APLL fout frequency calculation for Exynos4 based targets (especially Exynos4210 - Trats board). Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-07-12-13/+3222
|\ | | | | | | | | | | | | | | | | | | Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
| * Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-07-10-9/+3202
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| | * arm: exynos: fix clock calculationMinkyu Kang2013-07-09-5/+38
| | | | | | | | | | | | | | | | | | | | | | | | There are differnce with clock calcuation by cpu variations. This patch will fix it according to user manual. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
| | * EXYNOS: Move files from board/samsung to arch/armRajeshwari Shinde2013-07-05-4/+3074
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch performs the following: 1) Convert the assembly code for memory and clock initialization to C code. 2) Move the memory and clock init codes from board/samsung to arch/arm 3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted the common lowlevel_init from assembly to C-code 4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5. 5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already done in _main. 6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250. TEST: Tested SD-MMC boot on SMDK5250 and Origen. Tested USB and SPI boot on SMDK5250 Compile tested for SMDKV310. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * EXYNOS4210: Configure GPIO for uartRajeshwari Shinde2013-07-05-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch configures the gpio values for UART on Origen and SMDKV310 using pinmux Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * EXYNOS: Add API for power reset and exit wakeupRajeshwari Shinde2013-07-05-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds APIs to get power reset status and exit the wakeup condition for both exynos5 and exynos4 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5Axel Lin2013-07-02-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs. These SoCs have different gpio count but currently omap_gpio driver uses hard coded 192 which is wrong. This patch fixes this issue by: 1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h. 2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5. Thanks for Lubomir Popov to provide valuable comments to fix this issue. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Acked-by: Heiko Schocher <hs@denx.de>
| * | ARM: OMAP4+: Fix MA detection during SDRAM_AUTO_DETECTIONLokesh Vutla2013-07-02-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During SDRAM_AUTO_DETECTION MA is not configured. For Soc's > OMAP4460 MA is present. So populating MA for the same. Tested on OMAP4430 PANDA, OMAP4460 PANDA. Reported-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-28-0/+10
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| | * | mx27: add i2c clocktrem2013-06-26-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org> Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
| | * | mx27: add function enable_cachestrem2013-06-26-0/+8
| | | | | | | | | | | | | | | | Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
| * | | pxa: use -mcpu=xscale compiler optionMike Dunn2013-06-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass '-mcpu=xscale' to the compiler instead of march and mtune. This will cause gcc to define the __XSCALE__ macro. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
| * | | pxa: turn icache off in cpu_init_crit()Mike Dunn2013-06-22-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The comment in the low-level initialization function cpu_init_crit() says that the caches are being disabled, but (oddly) the icache is actually turned on. This is probably not a good idea prior to relocating code, so this patch turns it off. Tested on the pxa270. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
* | | | exynos: Avoid function instrumentation for microsecond timerSimon Glass2013-06-26-1/+1
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | For tracing to work it has to be able to access the microsecond timer without causing a recursive call to the function entry/exit handlers. Add attributes to the relevant functions to support this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | arm: make __rel_dyn_{start, end} compiler-generatedAlbert ARIBAUD2013-06-21-4/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change is only done where needed: some linker scripts may contain relocation symbols yet remain unchanged. __rel_dyn_start and __rel_dyn_end each requires its own output section; putting them in relocation sections changes their flags and breaks relocation. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* | | arm: make __image_copy_{start, end} compiler-generatedAlbert ARIBAUD2013-06-21-4/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change is only done where needed: some linker scripts may contain __image_copy_{start,end} yet remain unchanged. Also, __image_copy_end needs its own section; putting it in relocation sections changes their flags and makes relocation break. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* | | remove all references to .dynsymAlbert ARIBAUD2013-06-21-25/+3
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Discard all .dynsym sections from linker scripts Remove all __dynsym_start definitions from linker scripts Remove all __dynsym_start references from the codebase Note: this touches include/asm-generic/sections.h, which is not ARM-specific, but actual uses of __dynsym_start are only in ARM, so this patch can safely go through the ARM repository. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-19-2/+47
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| * | arm, am33xx: move uart soft reset code to common placeHeiko Schocher2013-06-18-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move uart soft reset code to common place and call this function from board code, instead of copy and paste this code for every board. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Tom Rini <trini@ti.com> [trini: Fix igep0033 build, remove 'regval' on pcm051] Signed-off-by: Tom Rini <trini@ti.com>
| * | arm, am335x: make mpu pll config configurableHeiko Schocher2013-06-18-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | upcoming support for siemens boards switches mpu pll clk in board code. So make this configurable. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
| * | arm, am33xx: move rtc32k_enable() to common placeHeiko Schocher2013-06-18-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move rtc32k_enable() to common place so all am33xx boards can use it. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
generated by cgit v1.1 at 2024-12-25 14:24:32 +0000