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| * Merge branch 'next'Tom Rini2014-04-17-70/+2
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| | * aes: Move the AES-128-CBC encryption function to common codeMarek Vasut2014-03-21-70/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move the AES-128-CBC encryption function implemented in tegra20-common/crypto.c into lib/aes.c . This is well re-usable common code. Moreover, clean the code up a bit and fix the kerneldoc-style annotations. Signed-off-by: Marek Vasut <marex@denx.de>
* | | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-21-181/+1833
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| * | | arm, da850: staticize funtionsManish Badarkhe2014-04-17-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Make funtions static which are locally used in file and remove the declaration from header file. Signed-off-by: Manish Badarkhe <badarkhe.manish@gmail.com>
| * | | am335x: Switch to CONFIG_SKIP_LOWLEVEL_INIT from guarding SPL or NOR_BOOTTom Rini2014-04-17-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the case of SPL or NOR_BOOT (no SPL involved) we need to include certain code in the build. Use !CONFIG_SKIP_LOWLEVEL_INIT rather than CONFIG_SPL_BUILD || CONFIG_NOR_BOOT to make the code clearer, and to make supporting XIP QSPI boot clearer in the code. Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: Wolfgang Denk <wd@denx.de>
| * | | keystone2: add keystone multicore navigator driverVitaly Andrianov2014-04-17-0/+377
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Multicore navigator consists of Network Coprocessor (NetCP) and Queue Manager sub system. More details on the hardware can be obtained from the following links:- Network Coprocessor: http://www.ti.com/lit/pdf/sprugz6 Multicore Navigator: http://www.ti.com/lit/pdf/sprugr9 Multicore navigator driver implements APIs to configure the Queue Manager and NetCP Pkt DMA. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: WingMan Kwok <w-kwok2@ti.com> Acked-by: Tom Rini <trini@ti.com>
| * | | k2hk: add support for k2hk SOC and EVMVitaly Andrianov2014-04-17-0/+1135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | k2hk EVM is based on Texas Instruments Keystone2 Hawking/Kepler SoC. Keystone2 SoC has ARM v7 Cortex-A15 MPCore processor. Please refer the ti/k2hk_evm/README for details on the board, build and other information. This patch add support for keystone architecture and k2hk evm. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: WingMan Kwok <w-kwok2@ti.com> Signed-off-by: Sandeep Nair <sandeep_n@ti.com>
| * | | i2c, davinci: convert driver to new mutlibus/mutliadapter frameworkVitaly Andrianov2014-04-17-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add davinci driver to new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Heiko Schocher <hs@denx.de>
| * | | arm: add support for arch timerVitaly Andrianov2014-04-17-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add basic support for the architecture timer found on recent ARMv7 based SoCs. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
| * | | dra7xx_evm: Add QSPI_4 support, qspiboot build targetTom Rini2014-04-17-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We previously only supported QSPI_1 (single) support. Add QSPI_4 (quad) read support as well. This means we can be given one of two boot device values, but don't care which it is, so perform a fixup on the QSPI_4 value. We add a qspiboot build target to better show how you would use QSPI as a boot device in deployment. When we boot from QSPI, we can check the environment for 'boot_os' to control Falcon Mode. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
| * | | omap3/sys_info: provide interface to read die idNishanth Menon2014-04-17-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | introduce get_die_id() function which allows generation of information such as fake MAC address from the processor ID code. Signed-off-by: Nishanth Menon <nm@ti.com>
| * | | OMAP: common: consolidate fake USB ethernet MAC address creationNishanth Menon2014-04-17-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TI platforms such as OMAP5uevm, PandaBoard, use equivalent logic to generate fake USB MAC address from device unique DIE ID. Consolidate this to a generic location such that other TI platforms such as BeagleBoard-XM can also use the same. NOTE: at this point in time, I dont yet see a need for a generic dummy ethernet MAC address creation function, but if there is a need in the future, this can be further abstracted out. Signed-off-by: Nishanth Menon <nm@ti.com>
| * | | ARM: OMAP: replace custom sr32() by standard I/O accessorsWolfgang Denk2014-04-17-163/+205
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the custom bit manipulation function sr32() by standard I/O accessors. A major motivation for this cleanup was the fact, that a number of calls of that function resulted in 32 bit wide shift operations on u32 data, which according to the C-ISO/IEC-9899-Standard provokes undefined behaviour: 6.5.7 Bitwise shift operators ... If the value of the right operand is negative or is greater than or equal to the width of the promoted left operand, the behavior is undefined. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | | ARM: OMAP: hide custom bit manipulation function sr32()Wolfgang Denk2014-04-17-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only remaining user of the custom bit manipulation function sr32() is arch/arm/cpu/armv7/omap3/clock.c, so make it a static function in that file to prepare complete removal. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | | ARM: OMAP: remove sr32() from OMAP board codeWolfgang Denk2014-04-17-2/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the custom sr32() bit manipulation function in arch/arm/cpu/armv7/omap3/board.c and board/ti/panda/panda.c by standard I/O accessors. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | | ARM: tegra: pack pinmux data tables tighterStephen Warren2014-04-17-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use smaller fields in the Tegra pinmux structures in order to pack the data tables into a smaller space. This saves around 1-3KB for the SPL and around 3-8KB for the main build of U-Boot, depending on the board, which SoC it uses, and how many pinmux table entries there are. In order to pack PMUX_FUNC_* into a smaller space, don't hard-code the values of PMUX_FUNC_RSVD* to values which require 16 bits to store them, but instead let their values be assigned automatically, so they end up fitting into 8 bits. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: Tegra124 pinmux cleanupStephen Warren2014-04-17-247/+258
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra124_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. There are differences in the set of drive groups. I have validated this against the TRM. There are differences order of pin definitions in pinmux.c; these previously had significant mismatches with the correct order:-( I adjusted a few entries in pinmux-config-venice2.h since the set of legal functions for some pins was updated to match the TRM. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: Tegra114 pinmux cleanupStephen Warren2014-04-17-252/+243
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra114_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. This introduces a few changes to pin/group/function naming and the set of available functions for each pin. The new values now exactly match the TRM; the chip documentation. I adjusted a few entries in pinmux-config-dalmore.h due to this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: Tegra30 pinmux cleanupStephen Warren2014-04-17-287/+275
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra30_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. This introduces a few changes to pin/group/function naming and the set of available functions for each pin. The new values now exactly match the TRM; the chip documentation. I adjusted one entry in pinmux-config-cardhu.h due to this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: Tegra20 pinmux cleanupStephen Warren2014-04-17-239/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames all the Tegra20 pinmux pins and functions so they have a prefix which matches the type name. The entries in tegra20_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: pinmux naming consistency fixesStephen Warren2014-04-17-71/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up the naming of pinmux-related objects: * Refer to drive groups rather than pad groups to match the Linux kernel. * Ensure all pinmux API types are prefixed with pmux_, values (defines) are prefixed with PMUX_, and functions prefixed with pinmux_. * Modify a few type names to make their content clearer. * Minimal changes to SoC-specific .h/.c files are made so the code still compiles. A separate per-SoC change will be made immediately following, in order to keep individual patch size down. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: reduce public pinmux APIStephen Warren2014-04-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove a few unused functions from the pinmux header. They aren't currently used, and removing them prevents any new usage from appearing. This will ease moving to just pinmux_config_table() and padgrp_config_table() in the future. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: pinctrl: remove duplicationStephen Warren2014-04-17-1374/+522
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Much of arch/arm/cpu/tegra*-common/pinmux.c is identical. Remove the duplication by creating pinmux-common.c for all the identical code. This leaves: * arch/arm/include/asm/arch-tegra*/pinmux.h defining only the names of the various pins/pin groups, drive groups, and mux functions. * arch/arm/cpu/tegra*-common/pinmux.c containing only the lookup table stating which pin groups support which mux functions. The code in pinmux-common.c is semantically identical to that in the various original pinmux.c, but had some consistency and cleanup fixes applied during migration. I removed the definition of struct pmux_tri_ctlr, since this is different between SoCs (especially Tegra20 vs all others), and it's much simpler to deal with this via the new REG/MUX_REG/... defines. spl.c, warmboot.c, and warmboot_avp.c needed updates due to this, since they previously hijacked this struct to encode the location of some non-pinmux registers. Now, that code simply calculates these register addresses directly using simple and obvious math. I like this method better irrespective of the pinmux code cleanup anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: use apb_misc.h in more placesStephen Warren2014-04-17-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra's "APB misc" register region contains various miscellaneous registers and the Tegra pinmux registers. Some code that touches the misc registers currently uses struct pmux_tri_ctlr, which is intended to be a definition of pinmux registers, rather than struct apb_misc_pp_ctrl, which is intended to be a definition of the miscellaneous registers. Convert all such code to use struct apb_misc_pp_ctrl, since struct pmux_tri_ctlr goes away in the next patch. This requires adding a missing field definition to struct apb_misc_pp_ctrl, and moving the header into a more common location. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: pinctrl: make pmux_func values consistent on Tegra20Stephen Warren2014-04-17-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For consistency with other SoCs, modify Tegra20's enum pmux_func to: * Remove PMUX_FUNC values that aren't real * Use the same PMUX_FUNC_RSVD[1-4] values, and ensure (RSVD1 & 3)==0; this will be assumed by pinmux_set_func() in a future patch. Unfortunately, PMUX_FUNC_RSVD is still used in the pin macros. Use a private define inside the driver to prevent this from causing compilaton errors. This will be cleaned up when the pin tables are re-written in a later patch in this series. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: pinctrl: remove vddioStephen Warren2014-04-17-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This field isn't used anywhere, so remove it. Note that PIN() macros are left unchanged for now, to avoid many diffs to them; later commits will completely rewrite them just one time. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: pinctrl: remove func_safeStephen Warren2014-04-17-20/+0
|/ / | | | | | | | | | | | | | | | | | | This field isn't used anywhere, so remove it. Note that PIN() macros are left unchanged for now, to avoid many diffs to them; later commits will completely rewrite them just one time. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-08-312/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile include/configs/trats.h include/configs/trats2.h include/mmc.h
| * | tegra: fix Makefile to pass per-file CFLAGSMasahiro Yamada2014-03-31-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since Kbuild was introduced, warmboot_avp.o has been compiled without -march=armv4t. Makefile should be adjusted to pass a per-file option. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com>
| * | kbuild: move asm-offsets.c from SoC directory to arch/$(ARCH)/libMasahiro Yamada2014-03-28-310/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot has supported two kinds of asm-offsets.h. One is generic for all architectures and its source is located at ./lib/asm-offsets.c. The other is SoC specific and its source is under SoC directory. The problem here is that only boards with SoC directory can use the asm-offsets infrastructure. Putting asm-offsets.c right under CPU directory does not work. Now a new demand is coming. PowerPC folks want to use asm-offsets. But no PowerPC boards have SoC directory. It seems inconsistent that some boards add asm-offsets.c to SoC directoreis and some to CPU directories. It looks more reasonable to put asm-offsets.c under arch/$(ARCH)/lib. This commit merges asm-offsets.c under SoC directories into arch/$(ARCH)/lib/asm-offsets.c. By the way, I doubt the necessity of some entries in asm-offsets.c. I am leaving refactoring to the board maintainers. Please check "TODO" in the comment blocks in arch/{arm,nds32}/lib/asm-offsets.c. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Yuantian Tang <Yuantian.Tang@freescale.com>
| * | kbuild: Rename UIMAGE to MKIMAGEMarek Vasut2014-03-28-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot uses the 'mkimage' tool to produce various image types, not only uImage image type. Rename the invocation name from UIMAGE to MKIMAGE. The following command was used to do the replacement: git grep 'quiet_cmd_mkimage.* = UIMAGE' | cut -d : -f 1 | \ xargs -i sed -i "s@\(quiet_cmd_mkimage\)\(.*\) = UIMAGE @\1\2 = MKIMAGE@" {} Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | arm64 patch: gicv3 supportDavid Feng2014-04-08-114/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add gicv3 support to uboot armv8 platform. Changes for v2: - rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S - move smp_kick_all_cpus() from gic.S to start.S, it would be implementation dependent. - Each core initialize it's own ReDistributor instead of master initializeing all ReDistributors. This is advised by arnab.basu <arnab.basu@freescale.com>. Signed-off-by: David Feng <fenghua@phytium.com.cn>
* | ARMv8: fix bug for flush data cache by set/wayLeo Yan2014-04-07-3/+1
| | | | | | | | | | | | | | | | | | When flush the d$ with set/way instruction, it need calculate the way's offset = log2(Associativity); but in current uboot's code, it use below formula to calculate the offset: log2(Associativity * 2 - 1), so finally it cannot flush data cache properly. Signed-off-by: Leo Yan <leoy@marvell.com>
* | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-07-1/+6
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| * | ARM: Add workaround for Cortex-A9 errata 761320Nitin Garg2014-04-07-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Full cache line writes to the same memory region from at least two processors might deadlock the processor. Exists on r1, r2, r3 revisions. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | ARM: Add workaround for Cortex-A9 errata 794072Nitin Garg2014-04-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | A short loop including a DMB instruction might cause a denial of service on another processor which executes a CP15 broadcast operation. Exists on r1, r2, r3, r4 revisions. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* | | armv8/cache: Change cache invalidate and flush functionYork Sun2014-04-07-20/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When SoC first boots up, we should invalidate the cache but not flush it. We can use the same function for invalid and flush mostly, with a wrapper. Invalidating large cache can ben slow on emulator, so we postpone doing so until I-cache is enabled, and before enabling D-cache. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
* | | armv8/cache: Flush D-cache, invalidate I-cache for relocationYork Sun2014-04-07-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | If D-cache is enabled, we need to flush it, and invalidate i-cache before jumping to the new location. This should be done right after relocation. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
* | | armv8/cache: Consolidate setting for MAIR and TCRYork Sun2014-04-07-25/+19
| | | | | | | | | | | | | | | | | | | | | | | | Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with sub-architecture. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
* | | arm: Handle .gnu.hash section in ldscriptsAndreas Färber2014-04-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoids "could not find output section .gnu.hash" ld.bfd errors on openSUSE. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | | socfpga: Adding Clock Manager driverChin Liang See2014-04-07-1/+451
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | Clock Manager driver will be called to reconfigure all the clocks setting based on user input. The input are passed to Preloader through handoff files Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* | arm: mxs: Add support for generating signed BootStreamMarek Vasut2014-04-04-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the groundwork for generating signed BootStream, which can be used by the HAB library in i.MX28. We are adding a new target, u-boot-signed.sb , since the process for generating regular non-signed BootStream is much easier. Moreover, the signed bootstream depends on external _proprietary_ _binary-only_ tool from Freescale called 'cst', which is available only under NDA. To make things even uglier, the CST or HAB mandates a kind-of circular dependency. The problem is, unlike the regular IVT, which is generated by mxsimage, the IVT for signed boot must be generated by hand here due to special demands of the CST. The U-Boot binary (or SPL binary) and IVT are then signed by the CST as a one block. But here is the problem. The size of the entire image (U-Boot, IVT, CST blocks) must be appended at the end of IVT. But the size of the entire image is not known until the CST has finished signing the U-Boot and IVT. We solve this by expecting the CST block to be always 3904B (which it is in case two files, U-Boot and the hand-made IVT, are signed in the CST block). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-arm into masterStefano Babic2014-04-04-84/+85
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
| * \ Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-25-14/+15
| |\ \ | | |/ | | | | | | | | | | | | | | | | | | Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
| | * kbuild,mxs: use short logs for MXS imagesMasahiro Yamada2014-03-12-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Lauri Hintsala <lauri.hintsala@bluegiga.com> Acked-by: Marek Vasut <marex@denx.de>
| * | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-13-0/+29
| |\ \
| | * | arm: exynos: Squash bogus warnings in pinmuxMarek Vasut2014-03-13-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Squash these warnings in pinmux.c found with GCC 4.8: /arch/arm/cpu/armv7/exynos/pinmux.c: In function 'exynos_pinmux_config': /arch/arm/cpu/armv7/exynos/pinmux.c:687:28: warning: 'count' may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = start; i < start + count; i++) { ^ /arch/arm/cpu/armv7/exynos/pinmux.c:663:16: note: 'count' was declared here int i, start, count; ^ /arch/arm/cpu/armv7/exynos/pinmux.c:687:28: warning: 'start' may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = start; i < start + count; i++) { ^ /arch/arm/cpu/armv7/exynos/pinmux.c:663:9: note: 'start' was declared here int i, start, count; ^ /arch/arm/cpu/armv7/exynos/pinmux.c:689:19: warning: 'bank' may be used uninitialized in this function [-Wmaybe-uninitialized] s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2)); ^ /arch/arm/cpu/armv7/exynos/pinmux.c:662:24: note: 'bank' was declared here struct s5p_gpio_bank *bank; ^ /arch/arm/cpu/armv7/exynos/pinmux.c: In function 'exynos_pinmux_config': /arch/arm/cpu/armv7/exynos/pinmux.c:687:28: warning: 'count' may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = start; i < start + count; i++) { ^ /arch/arm/cpu/armv7/exynos/pinmux.c:663:16: note: 'count' was declared here int i, start, count; ^ /arch/arm/cpu/armv7/exynos/pinmux.c:687:28: warning: 'start' may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = start; i < start + count; i++) { ^ /arch/arm/cpu/armv7/exynos/pinmux.c:663:9: note: 'start' was declared here int i, start, count; ^ /arch/arm/cpu/armv7/exynos/pinmux.c:689:19: warning: 'bank' may be used uninitialized in this function [-Wmaybe-uninitialized] s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2)); ^ /arch/arm/cpu/armv7/exynos/pinmux.c:662:24: note: 'bank' was declared here struct s5p_gpio_bank *bank; ^ Note that the warning is bogus, the function can never be called with invalid 'peripheral' argument. GCC just cannot analyze this. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | exynos4:pinmux:fdt: decode peripheral idPiotr Wilczek2014-03-12-0/+17
| | |/ | | | | | | | | | | | | | | | | | | | | | This patch adds api to decode peripheral id based on interrupt number. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | am33xx: Rework #ifdef's around s_init for clarityTom Rini2014-03-12-5/+3
| |/ | | | | | | | | | | | | | | | | | | The s_init function is only called on SPL or XIP cases, so lets only build it for them. This makes the #if logic within the function a bit clearer as to when we are or are not calling things, and makes it easier to see that for example preloader_console_init isn't ever called in the non-XIP full U-Boot case. Signed-off-by: Tom Rini <trini@ti.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-03-10-8/+38
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