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* | | | linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada2014-11-23-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com>
* | | | include: move various macros to include/linux/kernel.hMasahiro Yamada2014-11-20-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot has imported various utility macros from Linux scattering them to various places without consistency. In include/common.h are min, max, min3, max3, ARRAY_SIZE, ALIGN, container_of, DIV_ROUND_UP, etc. In include/linux/compat.h are min_t, max_t, round_up, round_down, etc. We also have duplicated defines of min_t in some *.c files. Moreover, we are suffering from too cluttered include/common.h. This commit moves various macros that originate in include/linux/kernel.h of Linux to their original position. Note: This commit simply moves the macros; the macros roundup, min, max, min2, max3, ARRAY_SIZE are different from those of Linux at this point. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | replace DIV_ROUND with DIV_ROUND_CLOSESTMasahiro Yamada2014-11-20-4/+5
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux-compatible macro DIV_ROUND_CLOSEST is a bit more flexible and safer than DIV_ROUND. For example, foo = DIV_ROUND_CLOSEST(x, y++) works expectedly, but foo = DIV_ROUND(x, y++) does not. (y is incremented twice.) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: atmel: add sama5d4ek board supportBo Shen2014-11-17-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code for this board supports following features: - Boot media support: NAND flash/SD card/SPI flash - Support LCD display - Support ethernet - Support USB mass storage Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | arm, spl, at91: add at91sam9260 and at91sam9g45 spl supportHeiko Schocher2014-11-17-96/+396
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add support for using spl code on at91sam9260 and at91sam9g45 based boards. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> [adopt Bo's change in spl.c] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45Heiko Schocher2014-11-17-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - compile mpddrc ram init code also for AT91SAM9M10G45 based boards. - in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED in the cr configuration Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | arm, at91, mpddrc: fix typo in ddr2_init()Heiko Schocher2014-11-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | use the configure value for computing the ba_off value not the value from the cr register. This leaded in a wrong ram configuration on the upcoming corvus spl board support. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | arm, at91: generate boot.bin file for all atmel SoCHeiko Schocher2014-11-17-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | generate the boot.bin file for all atmel SoC (arm920, arm926, armv7) Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> [fix subject] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | ARM: atmel: spl: make css field configurableBo Shen2014-11-17-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | The clock source for master clock can be slow clock, main clock, plla clock or upll clock. So, make the clock source selection field in mckr can be configured. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | ARM: atmel: spl: make initialization more stableBo Shen2014-11-17-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | We need to make sure the main clock ready field in MCFR is set after switch to main crystal oscillator. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2014-11-17-0/+1932
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| * | arm: rmobile: Add support gose boardNobuhiro Iwamatsu2014-11-10-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gose board has R8A7793, 1GB DDR3-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - DDR3-SDRAM - SCIF - QSPI - SPI Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | arm: rmobile: Add support R8A7793Nobuhiro Iwamatsu2014-11-10-0/+1928
| | | | | | | | | | | | | | | | | | | | | | | | Renesas R8A7793 is CPU with Cortex-A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-14-2/+2
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| * | arm: imx: make bmode command work with SPL/U-Boot comboNikita Kiryanov2014-11-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bmode command forces the SoC to use a specific boot device by writing its boot mode into SRC_GPR9, and notifying the SoC of the change using SRC_GPR10[28] bit: if the bit is on, bootROM uses the value in SRC_GPR9 instead of SRC_SMBR1 to determine the boot device. SPL on the other hand is oblivious to this distinction, so once the bootROM loads SPL from the device configured in SRC_GPR10, SPL will attempt to load U-Boot from the device configured in SRC_SMBR1, which is not updated by the bootROM to the value in SRC_GPR9. The result is that the selected boot device is not used across all the boot stages. Update spl_boot_device() to look at gpr9 when necessary. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Heiko Schocher <hs@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2014-11-13-5/+641
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| * | | sun6i: Poke magic sram controller register to avoid cache issuesHans de Goede2014-11-13-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this the cache will only work in write-through mode, and as soon as it is put in write-back mode things break. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sun6i: Add dram initialization codeHans de Goede2014-11-13-0/+436
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add full support for dram initialization, using a fixed clock and autodetection of the memory organization (numbers of channels, bus-width, etc.). This is based on dram_sun6i.c and dram.h from u-boot in the Allwinner A31 SDK, extended with extra initialization sequences and the autodetect algorithm from boot0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sun4i: Rename dram files to dram_sun4i.xHans de Goede2014-11-13-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for adding sun6i dram support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sun6i: Add cpucfg register definitionsHans de Goede2014-11-13-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Not used atm, for future use (e.g. PSCI). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sun6i: Add clock functions needed for SPL / DRAM initHans de Goede2014-11-13-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock_init_safe and clockset_pll5 functions, as these are needed for SPL support resp. DRAM init (which is needed for SPL too). Also add some extra clock register constant defines. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sun6i: Add new p2wi controller driverOliver Schinagl2014-11-13-0/+118
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A31 uses a new push-pull two wire interface, which features higher transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8 bytes each time, this driver will only see very little use and thus is limited to single byte transmission only. Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-11-13-139/+7
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| * | | ARM: remove unused CPU directoryMasahiro Yamada2014-11-13-132/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no board with CPU "arm_intcm". Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| * | | ARM: cache_v7: Various minor cleanupsThierry Reding2014-11-12-7/+7
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove two gratuituous blank lines, uses u32 (instead of int) as the type for values that will be written to a register, moves the beginning of the variable declaration section to a separate line (rather than the one with the opening brace) and keeps the function signature on a single line where possible. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-11-13-0/+4
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| * | | kconfig: zynq: Add ZYBO boardPeter Crosthwaite2014-11-11-0/+4
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | Add a defconfig and Kconfigury for the Digilent ZYBO board. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | kconfig: arm: move "armv8" define to arch/arm/KconfigMasahiro Yamada2014-11-13-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs) collected the default values of CONFIG_SYS_CPU into arch/arm/Kconfig. This commit moves "armv8" to there for consistency. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Georges Savoundararadj <savoundg@gmail.com>
* | | kconfig: arm: select CPU_V7 for some new boardsMasahiro Yamada2014-11-13-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds "select CPU_V7" for some new boards that were not covered by commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs). Redundant "SYS_CPU" defines and "string" directives should be removed. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Georges Savoundararadj <savoundg@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2014-11-11-0/+29
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| * | arm: socfpga: Add socfpga_spim_enable() to reset_manager.cStefan Roese2014-11-07-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be needed by the upcoming Designware master SPI driver. As the SPI master controller is held in reset by the current Preloader implementation. So we need to release the reset for the driver to communicate with the controller. This function is called from arch_early_init_r() if the SPI driver is enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
| * | arm: socfpga: Add DW master SPI clock to clock_manager.cStefan Roese2014-11-07-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be needed by the upcoming Designware master SPI driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
* | | ARM: UniPhier: call pin_init() also in the normal bootMasahiro Yamada2014-11-12-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_UNIPHIER_SERIAL has been moved to Kconfig and it is defined in ./.config but not in spl/.config, so pin_init() should be called from the normal image so that UART works correctly. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: UniPhier: consolidate board_postclk_init() functionMasahiro Yamada2014-11-12-50/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit merges arch/arm/cpu/armv7/uniphier/ph1-*/board_postclk_init.c to arch/arm/cpu/armv7/uniphier/board_postclk_init.c Because PH1-Pro4 does not have the BCU block, add __weak to bcu_init(). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | usb: UniPhier: add UniPhier on-chip EHCI host driver supportMasahiro Yamada2014-11-12-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support EHCI host driver used on Panasonic UniPhier platform. Since Device Tree is not supported on UniPhier yet, the base address of USB cores are passed from board files (platdevice.c). TODO for me: Move the base address to device trees. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
* | | ARM: UniPhier: add EHCI host pin settings for PH1-Pro4Masahiro Yamada2014-11-12-0/+7
| | | | | | | | | | | | | | | | | | | | | These IO pins are necessary for port power control and over current detect. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: UniPhier: move DDR related configuration to KconfigMasahiro Yamada2014-11-12-19/+27
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: UniPhier: reset on-board devices on start-upMasahiro Yamada2014-11-12-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a support card is attached to the main board, the on-board SMSC9118 LAN controller is available. It must be kept in reset state for a while on start-up. When the board is kicked via a debbuger rather than pushing the hardware reset button, on-board chips are not reset; in this case the reset signals should be asserted by software. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: MXS: fix Uninitialized variable errorWolfgang Denk2014-11-10-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cppcheck reports: [arch/arm/cpu/arm926ejs/mxs/timer.c:96]: (error) Uninitialized variable: now Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | | cppcheck cleanup: fix nullPointer errorsWolfgang Denk2014-11-07-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a number of places where U-Boot intentionally and legally accesses physical address 0x0000, for example when installing exception vectors on systems where these are located in low memory. Add "cppcheck-suppress nullPointer" comments to silence cppcheck where this is intentional and legal. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | Merge git://git.denx.de/u-boot-tiTom Rini2014-11-07-3/+8
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| * | omap3: cm-t3517: add basic board supportIgor Grinberg2014-11-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CompuLab cm-t3517 is Computer on Module (CoM) based on AM3517 SoC. Features: up to 256MB DDR2, up to 512MB NAND, USB hub, mUSB, WiFi, BT, Analog audio codec, touch screen controller, LED. Add basic support including: LED, Serial console, NAND, MMC, GPIO, I2C, 256MB DRAM. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * | am335x: make get_board_rev() function weakIgor Grinberg2014-11-06-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current get_board_rev() function returns a hard coded value which is obviously incorrect for the majority of boards. Allow boards to provide a correct implementation by making this function weak. In addition open code the trivial and useless BOARD_REV_ID define and adjust the comment. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@ti.com>
* | | Merge branch 'rmobile' of git://www.denx.de/git/u-boot-shTom Rini2014-11-05-9/+7
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| * | | arm: rmobile: alt: Add external RAM bootNobuhiro Iwamatsu2014-11-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM. The default boot address is 0x70000000. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: koelsch: Add external RAM bootNobuhiro Iwamatsu2014-11-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM. The default boot address is 0x70000000. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: lager: Add external RAM bootNobuhiro Iwamatsu2014-11-04-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM. The default boot address is 0xB0000000. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: r8a7790: Update initialize L2 cacheNobuhiro Iwamatsu2014-11-04-9/+2
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialization of L2CTLR[5] was set only as R8A7790 by commit 237faf095fb43abbed6e40266ef7efccc8b9308b. However, initialization of cash needs to be performed continuously. This changes into the processing which continues initialization of L2CTLR[5] into L2CTLR cash and performs it. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-05-0/+21
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| * | imx: mx6sl: Set the preclk clock source to OSC 24MhzYe.Li2014-11-03-0/+17
| | | | | | | | | | | | | | | | | | | | | For MX6SL, uses the OSC 24Mhz as the preclk source in CCM. Align the preclk setting with kernel. Signed-off-by: Ye.Li <B37916@freescale.com>
generated by cgit v1.1 at 2024-11-19 22:29:37 +0000