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* Peach-Pi: Use the enhanced usb_copy() prototypeVadim Bendebury2014-11-17-2/+8
| | | | | | | | | | | | | Exynos5800 IROM has a different, from 5250 and 5420, prototype of the usb_copy() function. Luckily the earlier version did not expect any arguments, which means the same code could be used with old and new SoCs, the old ones just ignoring the arguments. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos5: ddr3: Choose between single or double channel configAkshay Saraswat2014-11-17-0/+10
| | | | | | | | | | | | Add a 4G configuration and choose it based on the number of banks declared in config file. A board with 4 SDRAM banks declared (as per CONFIG_NR_DRAM_BANKS) will end up with the 2G confiuration. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* DMC: Exynos5: Enable update mode for DREX controllerAlim Akhtar2014-11-17-0/+19
| | | | | | | | | | | | | | | | As per Exynos5800 UM ver 0.00 section 17.13.2.1 CONCONTROL register bit 3 [update_mode], Exynos5800 does not support the PHY initiated update. And it is recommanded to set this field to 1'b1 during initialization. This patch sets this bit. Applying MC-initiated mode makes DDL tracking ON, that helps in compensate MIF voltage variation. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Config: Exynos5800: Enable build for Peach-PiAkshay Saraswat2014-11-17-1/+6
| | | | | | | | | | | | | This adds following things : - New config and defconfig for Peach-Pi board. - Alterations in Kconfig and MAINTAINERS. - Addition of CONFIG_EXYNOS5800. - ADdition of exynos5800-peach-pi in dts list. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos5800: Introduce new proid for Exynos5800Akshay Saraswat2014-11-17-11/+12
| | | | | | | | | | | | | | This patch intends to add a new proid for Exynos5800 which is a variant of Exynos5420. Product id for Exynos5800 is 0x5422. Both Exynos5420 and Exynos5800 are pin to pin compitable. This gives us an advantage of reusing Exynos5420 clock, pinmux, memory and other settings. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-14-2/+2
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| * arm: imx: make bmode command work with SPL/U-Boot comboNikita Kiryanov2014-11-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bmode command forces the SoC to use a specific boot device by writing its boot mode into SRC_GPR9, and notifying the SoC of the change using SRC_GPR10[28] bit: if the bit is on, bootROM uses the value in SRC_GPR9 instead of SRC_SMBR1 to determine the boot device. SPL on the other hand is oblivious to this distinction, so once the bootROM loads SPL from the device configured in SRC_GPR10, SPL will attempt to load U-Boot from the device configured in SRC_SMBR1, which is not updated by the bootROM to the value in SRC_GPR9. The result is that the selected boot device is not used across all the boot stages. Update spl_boot_device() to look at gpr9 when necessary. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Heiko Schocher <hs@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2014-11-13-5/+641
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| * | sun6i: Poke magic sram controller register to avoid cache issuesHans de Goede2014-11-13-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Without this the cache will only work in write-through mode, and as soon as it is put in write-back mode things break. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sun6i: Add dram initialization codeHans de Goede2014-11-13-0/+436
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add full support for dram initialization, using a fixed clock and autodetection of the memory organization (numbers of channels, bus-width, etc.). This is based on dram_sun6i.c and dram.h from u-boot in the Allwinner A31 SDK, extended with extra initialization sequences and the autodetect algorithm from boot0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sun4i: Rename dram files to dram_sun4i.xHans de Goede2014-11-13-3/+3
| | | | | | | | | | | | | | | | | | | | | In preparation for adding sun6i dram support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sun6i: Add cpucfg register definitionsHans de Goede2014-11-13-2/+2
| | | | | | | | | | | | | | | | | | | | | Not used atm, for future use (e.g. PSCI). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sun6i: Add clock functions needed for SPL / DRAM initHans de Goede2014-11-13-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock_init_safe and clockset_pll5 functions, as these are needed for SPL support resp. DRAM init (which is needed for SPL too). Also add some extra clock register constant defines. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sun6i: Add new p2wi controller driverOliver Schinagl2014-11-13-0/+118
| |/ | | | | | | | | | | | | | | | | | | | | The A31 uses a new push-pull two wire interface, which features higher transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8 bytes each time, this driver will only see very little use and thus is limited to single byte transmission only. Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-11-13-139/+7
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| * | ARM: remove unused CPU directoryMasahiro Yamada2014-11-13-132/+0
| | | | | | | | | | | | | | | | | | | | | There is no board with CPU "arm_intcm". Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| * | ARM: cache_v7: Various minor cleanupsThierry Reding2014-11-12-7/+7
| |/ | | | | | | | | | | | | | | | | | | | | Remove two gratuituous blank lines, uses u32 (instead of int) as the type for values that will be written to a register, moves the beginning of the variable declaration section to a separate line (rather than the one with the opening brace) and keeps the function signature on a single line where possible. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-11-13-0/+4
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| * | kconfig: zynq: Add ZYBO boardPeter Crosthwaite2014-11-11-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a defconfig and Kconfigury for the Digilent ZYBO board. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | kconfig: arm: move "armv8" define to arch/arm/KconfigMasahiro Yamada2014-11-13-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs) collected the default values of CONFIG_SYS_CPU into arch/arm/Kconfig. This commit moves "armv8" to there for consistency. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Georges Savoundararadj <savoundg@gmail.com>
* | | kconfig: arm: select CPU_V7 for some new boardsMasahiro Yamada2014-11-13-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds "select CPU_V7" for some new boards that were not covered by commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs). Redundant "SYS_CPU" defines and "string" directives should be removed. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Georges Savoundararadj <savoundg@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2014-11-11-0/+29
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| * | arm: socfpga: Add socfpga_spim_enable() to reset_manager.cStefan Roese2014-11-07-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be needed by the upcoming Designware master SPI driver. As the SPI master controller is held in reset by the current Preloader implementation. So we need to release the reset for the driver to communicate with the controller. This function is called from arch_early_init_r() if the SPI driver is enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
| * | arm: socfpga: Add DW master SPI clock to clock_manager.cStefan Roese2014-11-07-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be needed by the upcoming Designware master SPI driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
* | | ARM: UniPhier: call pin_init() also in the normal bootMasahiro Yamada2014-11-12-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_UNIPHIER_SERIAL has been moved to Kconfig and it is defined in ./.config but not in spl/.config, so pin_init() should be called from the normal image so that UART works correctly. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: UniPhier: consolidate board_postclk_init() functionMasahiro Yamada2014-11-12-50/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit merges arch/arm/cpu/armv7/uniphier/ph1-*/board_postclk_init.c to arch/arm/cpu/armv7/uniphier/board_postclk_init.c Because PH1-Pro4 does not have the BCU block, add __weak to bcu_init(). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | usb: UniPhier: add UniPhier on-chip EHCI host driver supportMasahiro Yamada2014-11-12-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support EHCI host driver used on Panasonic UniPhier platform. Since Device Tree is not supported on UniPhier yet, the base address of USB cores are passed from board files (platdevice.c). TODO for me: Move the base address to device trees. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
* | | ARM: UniPhier: add EHCI host pin settings for PH1-Pro4Masahiro Yamada2014-11-12-0/+7
| | | | | | | | | | | | | | | | | | | | | These IO pins are necessary for port power control and over current detect. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: UniPhier: move DDR related configuration to KconfigMasahiro Yamada2014-11-12-19/+27
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: UniPhier: reset on-board devices on start-upMasahiro Yamada2014-11-12-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a support card is attached to the main board, the on-board SMSC9118 LAN controller is available. It must be kept in reset state for a while on start-up. When the board is kicked via a debbuger rather than pushing the hardware reset button, on-board chips are not reset; in this case the reset signals should be asserted by software. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: MXS: fix Uninitialized variable errorWolfgang Denk2014-11-10-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cppcheck reports: [arch/arm/cpu/arm926ejs/mxs/timer.c:96]: (error) Uninitialized variable: now Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | | cppcheck cleanup: fix nullPointer errorsWolfgang Denk2014-11-07-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a number of places where U-Boot intentionally and legally accesses physical address 0x0000, for example when installing exception vectors on systems where these are located in low memory. Add "cppcheck-suppress nullPointer" comments to silence cppcheck where this is intentional and legal. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | Merge git://git.denx.de/u-boot-tiTom Rini2014-11-07-3/+8
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| * | omap3: cm-t3517: add basic board supportIgor Grinberg2014-11-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CompuLab cm-t3517 is Computer on Module (CoM) based on AM3517 SoC. Features: up to 256MB DDR2, up to 512MB NAND, USB hub, mUSB, WiFi, BT, Analog audio codec, touch screen controller, LED. Add basic support including: LED, Serial console, NAND, MMC, GPIO, I2C, 256MB DRAM. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * | am335x: make get_board_rev() function weakIgor Grinberg2014-11-06-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current get_board_rev() function returns a hard coded value which is obviously incorrect for the majority of boards. Allow boards to provide a correct implementation by making this function weak. In addition open code the trivial and useless BOARD_REV_ID define and adjust the comment. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@ti.com>
* | | Merge branch 'rmobile' of git://www.denx.de/git/u-boot-shTom Rini2014-11-05-9/+7
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| * | | arm: rmobile: alt: Add external RAM bootNobuhiro Iwamatsu2014-11-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM. The default boot address is 0x70000000. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: koelsch: Add external RAM bootNobuhiro Iwamatsu2014-11-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM. The default boot address is 0x70000000. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: lager: Add external RAM bootNobuhiro Iwamatsu2014-11-04-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM. The default boot address is 0xB0000000. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: r8a7790: Update initialize L2 cacheNobuhiro Iwamatsu2014-11-04-9/+2
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialization of L2CTLR[5] was set only as R8A7790 by commit 237faf095fb43abbed6e40266ef7efccc8b9308b. However, initialization of cash needs to be performed continuously. This changes into the processing which continues initialization of L2CTLR[5] into L2CTLR cash and performs it. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-05-0/+21
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| * | imx: mx6sl: Set the preclk clock source to OSC 24MhzYe.Li2014-11-03-0/+17
| | | | | | | | | | | | | | | | | | | | | For MX6SL, uses the OSC 24Mhz as the preclk source in CCM. Align the preclk setting with kernel. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | imx: mx6: Change the get_ipg_per_clk for OSC 24Mhz sourceYe.Li2014-11-03-0/+4
| | | | | | | | | | | | | | | | | | | | | For MX6SL and MX6SX, the perclk can come from OSC 24Mhz source. Fix the get_ipg_per_clk function to support it. Signed-off-by: Ye.Li <B37916@freescale.com>
* | | dm: sunxi: Add pinmux functions which take a bank parameterSimon Glass2014-11-05-11/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With driver model we will have access to a bank pointer, so we want to use it rather than converting back to a number, and then back to a bank pointer. Add functions to provide this feature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?IIan Campbell2014-11-05-43/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | arm926ejs: cache: use __weakJeroen Hofstee2014-11-04-4/+1
| | | | | | | | | | | | | | | Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2014-11-03-1/+10
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| * | ARM: UniPhier: make pinmon command optionalMasahiro Yamada2014-10-29-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | Add CONFIG_CMD_PINMON to UniPhier-specific Kconfig and make the "pinmon" command user-configurable. This command can be disabled via the configuration if users do not need it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | arm: relocate the exception vectorsGeorges Savoundararadj2014-10-29-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit relocates the exception vectors. As ARM1176 and ARMv7 have the security extensions, it uses VBAR. For the other ARM processors, it copies the relocated exception vectors to the correct address: 0x00000000 or 0xFFFF0000. Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Tom Warren <twarren@nvidia.com>
* | | kconfig: arm: introduce symbol for ARM CPUsGeorges Savoundararadj2014-10-29-48/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces a Kconfig symbol for each ARM CPU: CPU_ARM720T, CPU_ARM920T, CPU_ARM926EJS, CPU_ARM946ES, CPU_ARM1136, CPU_ARM1176, CPU_V7, CPU_PXA, CPU_SA1100. Also, it adds the CPU feature Kconfig symbol HAS_VBAR which is selected for CPU_ARM1176 and CPU_V7. For each target, the corresponding CPU is selected and the definition of SYS_CPU in the corresponding Kconfig file is removed. Also, it removes redundant "string" type in some Kconfig files. Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
generated by cgit v1.1 at 2024-12-29 09:40:47 +0000