summaryrefslogtreecommitdiff
path: root/arch/arm/cpu/armv7
Commit message (Collapse)AuthorAgeLines
...
* | am33xx: Rework #ifdef's around s_init for clarityTom Rini2014-03-12-5/+3
|/ | | | | | | | | | The s_init function is only called on SPL or XIP cases, so lets only build it for them. This makes the #if logic within the function a bit clearer as to when we are or are not calling things, and makes it easier to see that for example preloader_console_init isn't ever called in the non-XIP full U-Boot case. Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-03-10-3/+5
|\
| * ARM: AM43xx: Change DDR3 Reset ValueDave Gerlach2014-03-04-1/+1
| | | | | | | | | | | | | | | | | | The bit DDR3_RST_DEF_VAL inside CTRL_DDR_IO represents the default value of the ddr reset value for DDR3 before the EMIF takes over. We must have this bit set high so that on exit from DeepSleep0 within the kernel the reset line has the proper value. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
| * ARM: AM43xx: Write sdram_config to secure_emif_sdram_configDave Gerlach2014-03-04-0/+1
| | | | | | | | | | | | | | | | | | The register secure_emif_sdram_config in control module is copied to the EMIF sdram_config register when it is coming out of DeepSleep0 in order to ensure that the EMIF comes up for the correct type of DDR. Without this, resume can hang from within the kernel. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
| * ARM: AM43xx: EMIF: configure self-refresh entry delayDave Gerlach2014-03-04-2/+2
| | | | | | | | | | | | | | | | | | | | Per a suggestion from the hardware team, program the emif_pwr_mgmt_ctrl and emif_pwr_mgmt_ctrl_shdw registers within the EMIF to hold the desired delay in cycles that the EMIF waits without an access to enter self-refresh, in this case 8192 cycles. With this, code desiring to enter self refresh only has to toggle one bit to enable it. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
| * ARM: AM43xx: clocks: Enable CPGMAC clock controlMugunthan V N2014-03-04-0/+1
| | | | | | | | | | | | Enable CPGMAC clock control for AM43xx to use ethernet in U-Boot Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* | sizes.h - consolidate for all architecturesAlexey Brodkin2014-03-04-4/+4
|/ | | | | | | | | | | | | | | | Copied from Linux sources "include/linux/sizes.h" commit 413541dd66d51f791a0b169d9b9014e4f56be13c Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Tom Rini <trini@ti.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Tom Rini <trini@ti.com> Acked-by: Stefan Roese <sr@denx.de> [trini: Add bcm Kona platforms to the patch] Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-02-26-38/+1806
|\ | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/config.mk board/ti/am43xx/mux.c include/configs/am43xx_evm.h Signed-off-by: Tom Rini <trini@ti.com>
| * arm: Switch to -mno-unaligned-access when supported by the compilerTom Rini2014-02-26-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we tell the compiler to optimize for ARMv7 (and ARMv6 for that matter) it assumes a default of SCTRL.A being cleared and unaligned accesses being allowed and fast at the hardware level. We set this bit and must pass along -mno-unaligned-access so that the compiler will still breakdown accesses and not trigger a data abort. To better help understand the requirements of the project with respect to unaligned memory access, the Documentation/unaligned-memory-access.txt file has been added as doc/README.unaligned-memory-access.txt and is taken from the v3.14-rc1 tag of the kernel. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Tom Rini <trini@ti.com>
| * arm: remove unneeded symbol offsets and _TEXT_BASEAlbert ARIBAUD2014-02-26-26/+0
| | | | | | | | | | | | | | | | Remove the last uses of symbol offsets in ARM U-Boot. Remove some needless uses of _TEXT_BASE. Remove all _TEXT_BASE definitions. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * arm: make _end compiler-generatedAlbert ARIBAUD2014-02-26-4/+21
| | | | | | | | | | | | | | | | | | This prevents references to _end from generating absolute relocation records. This change is binary invariant for ARM targets. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-02-24-6/+27
| |\
| | * ti814x: Fix illegal use of FP ops in clock_ti814x.cMåns Rullgård2014-02-21-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The function pll_sigma_delta_val uses "float" data which is not correct. The exact "why" of this mangling is lost to history, but this changes us to equivalent non-FP math to get the same results. Reported-by: Wolfgang Denk <wd@denx.de> Acked-by: Matt Porter <mporter@linaro.org>
| | * DRA7: fix ABB efuse offset for OPP_NOMNishanth Menon2014-02-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 194dd74ad919e57026f385aaab7f89acf7ea79ef (DRA7: add ABB setup for MPU voltage domain) Made an offset typo error by using 0x4A003B24 as the efuse offset for OPP_NOM. As per TI documentation, 0x4A003B24 is for OPP_OD, and 0x4A003B20 is for OPP_NOM. Fix the same. Reported-by: Praveen Rao <prao@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
| | * ARM: OMAP4: fix DDR timings for OMAP4430 ES2.0Janne Grunau2014-02-21-0/+18
| | | | | | | | | | | | | | | | | | | | | DDR timings were broken since 47abc3df701d8bc26f311350aa523fc1d0f8ad4e for PandaBoard EA1. Signed-off-by: Janne Grunau <j@jannau.net>
| | * ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator controlDave Gerlach2014-02-21-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Schematic indicates GPIO5_7 is to be used for VTT regulator control rather than GPIO0_21 so modify enable_vtt_regulator to reflect this. Without this some boards will experience DDR3 corruption and fail to boot. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> [trini: Rework patch against mainline] Signed-off-by: Tom Rini <trini@ti.com>
| * | arch: bcm281xx: Initial commit of bcm281xx architecture codeDarwin Rambo2014-02-22-0/+1694
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add bcm281xx architecture support code including a clock framework and chip reset. Define register block base addresses for the bcm281xx architecture and create an empty gpio header file required when CONFIG_CMD_GPIO is set. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Reviewed-by: Tim Kryger <tkryger@linaro.org>
| * | arch: kona: Initial commit of kona-common architecture codeDarwin Rambo2014-02-22-0/+59
| |/ | | | | | | | | | | | | | | | | The Kona architecture is present on a number of Broadcom mobile SoCs including the bcm281xx family of chips. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Reviewed-by: Tim Kryger <tkryger@linaro.org>
* | arm: omap: delete unincluded omap-common/config.mkMasahiro Yamada2014-02-25-9/+0
| | | | | | | | | | | | | | | | | | | | | | arch/arm/cpu/armv7/omap-common/config.mk is never included because "omap-common" is not SoC name. If we want to add OMAP-specific compiler flags, they must be added to omap3/config.mk, omap4/config.mk, omap5/config.mk. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
* | kbuild: refactor more IMX image rulesMasahiro Yamada2014-02-25-10/+0
| | | | | | | | | | | | | | | | | | This commit avoids generating ./SPL twice. - Fist time descending to spl/ - Second time as a prerequisite of u-boot-with-spl.imx, u-boot-with-nand-spl.imx. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kbuild: use shorten logs for IMX imagesMasahiro Yamada2014-02-25-1/+1
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kbuild: use shorten logs for mkimage rulesMasahiro Yamada2014-02-25-5/+5
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | arm: delete unused macro CONFIG_ARCH_DEVICE_TREEMasahiro Yamada2014-02-24-10/+0
| | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Rajeshwari Birje <rajeshwari.s@samsung.com> Cc: Inderpal Singh <inderpal.singh@linaro.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2014-02-21-0/+1
|\ \ | |/ |/|
| * am43xx: Add qspi supportSourav Poddar2014-02-18-0/+1
| | | | | | | | | | | | | | Add QSPI definitions and clock configuration support. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-02-20-9/+18
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: Makefile drivers/net/npe/Makefile These two conflicts arise from commit 0b2d3f20 ("ARM: NET: Remove the IXP NPE ethernet driver") and are resolved by deleting the drivers/net/npe/Makefile file and removing the CONFIG_IXP4XX_NPE line from Makefile.
| * | kbuild,tegra124: add dummy obj- for KbuildMasahiro Yamada2014-02-19-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | In Kbuild, every makefile must have non-empty obj- or obj-y. Otherwise, built-in.o will not be created and the link stage will fail. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | Move #ifdef(CONFIG_DISPLAY_CPUINFO) from caller to calleeMasahiro Yamada2014-02-19-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - When CONFIG_DISPLAY_CPUINFO is not enabled, print_cpuinfo() should be defined as an empty function in a header, include/common.h - Remove #ifdef CONFIG_DISPLAY_CPUINFO .. #endif from caller, common/board_f.c and arch/arm/lib/board.c - Remove redundant prototypes in arch/arm/lib/board.c, arch/arm/include/asm/arch-am33x/sys_proto.h and board/nokia/rx51/rx51.h, keeping the one in include/common.h - Add #ifdef CONFIG_DISPLAY_CPUINFO to the func definition where it is missing Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | kbuild: add dummy obj-y to create built-in.oMasahiro Yamada2014-02-19-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | We are going to switch over to Kbuild in upcoming commits. Each makefile must have non-empty obj- or obj-y to generate built-in.o on Kbuild. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | kbuild: change out-of-tree buildMasahiro Yamada2014-02-19-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit changes the working directory where the build process occurs. Before this commit, build process occurred under the source tree for both in-tree and out-of-tree build. That's why we needed to add $(obj) prefix to all generated files in makefiles like follows: $(obj)u-boot.bin: $(obj)u-boot Here, $(obj) is empty for in-tree build, whereas it points to the output directory for out-of-tree build. And our old build system changes the current working directory with "make -C <sub-dir>" syntax when descending into the sub-directories. On the other hand, Kbuild uses a different idea to handle out-of-tree build and directory descending. The build process of Kbuild always occurs under the output tree. When "O=dir/to/store/output/files" is given, the build system changes the current working directory to that directory and restarts the make. Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj=<sub-dir>" syntax for descending into sub-directories. (We can write it like "make $(obj)=<sub-dir>" with a shorthand.) This means the current working directory is always the top of the output directory. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Gerhard Sittig <gsi@denx.de>
| * | ARM: O5/dra7xx: Add SATA boot supportDan Murphy2014-02-19-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the SATA boot support for OMAP5 and dra7xx. Renamed the omap_sata_init to the common init_sata(int dev) for commonality in with sata stack. Added the ROM boot device ID for SATA. Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-02-19-14/+173
|\ \ \
| * \ \ Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-02-11-246/+29
| |\ \ \
| * | | | ARM: imx6: fix wrong fec clkMarkus Niebel2014-02-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | imx_get_fecclk() returns enet_ref instead of ipg. Since the clock is used to calculate the prescaler for the MDIO interface wrong values can be calculated. Tested on a custom MX6S board with 100MBit interface Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
| * | | | mx6: Enable L2 cache supportFabio Estevam2014-02-11-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add L2 cache support and enable it by default. Configure the L2 cache in the same way as done by FSL kernel: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | | mx6: Distinguish mx6dual from mx6quadFabio Estevam2014-02-11-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently when we boot a mx6dual U-boot reports that it is a mx6quad. Report it as MX6D instead: CPU: Freescale i.MX6D rev1.2 at 792 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | | imx6: make sure MMDC_CHx_MASK is clear to avoid warm reset failureAnson Huang2014-02-11-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Boot ROM may mask MMDC_CHx_MASK in CCM_CCDR(such as i.MX6SL TO1.2), it will cause warm reset fail, need to clear this MMDC_CHx_MASK field to make sure all the i.MX6 series SOCs reset function work. Otherwise, uboot "reset" command will fail, tested on i.MX6SL EVK board with TO1.2. Signed-off-by: Anson Huang <b20788@freescale.com>
| * | | | imx6: ensure AHB clock is 132MHz in low freq boot modeAnson Huang2014-02-11-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For low freq boot mode(ARM boot up with 396MHz), ROM will not set AHB clock to 132MHz, and the reset value of AHB divider is incorrect which will lead to wrong AHB rate, need to correct it. To enable low freq boot mode, need to set BOOT_CFG2[2] to high, tested on i.MX6Q/DL SabreSD board and i.MX6SL EVK board. Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Anson Huang <b20788@freescale.com>
| * | | | ARM: mx6: Add PCI express clock configurationMarek Vasut2014-01-26-10/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the SATA clock enabling function and add PCI express clock enabling function. The SATA clock enabling function starts up the 100MHz SATA reference PLL in ENET_PLL register, but the code can be re-used to enable the 125MHz PCIe reference in ENET_PLL, so pull this code into separate function. Moreover, add the PCIe clock enabling code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | | ARM: armv7: Make indirect vector addresses globlMarek Vasut2014-01-26-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make indirect vectors addresses global, so they can be replaced by various code that needs to do so. For example the MX6 PCI express driver needs to temporarily replace data abort handler when reading the config space. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * | | | Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-01-26-3/+15
| |\ \ \ \
* | | | | | arm: zynq: correct the argument to lldivSiva Durga Prasad Paladugu2014-02-19-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Typecast the argument with unsigned long long for proper calculation of lldiv Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | | | zynq: Add support for U-BOOT SPLMichal Simek2014-02-19-2/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPL is using ps7_init.c/h files which are generated from design tools which have to be copied to boards/xilinx/zynq folder before compilation. BSS section is moved to SDRAM because fat support requires more space than SRAM size. Added: - MMC and QSPI support - Boot OS directly from SPL - Enable SPL command Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | | zynq: Update CLK in bdinfoMichal Simek2014-02-19-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM has specific clk entries which should be also setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | | | zynq: Implement dump clock commandSoren Brinkmann2014-02-19-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable and implement dump clock command which shows soc frequencies. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | | | net: zynq_gem: Calculate clock dividers dynamicallySoren Brinkmann2014-02-19-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove hard coded clock divider setting and use the Zynq clock framework to dynamically calculate appropriate dividers at run time. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | | | net: zynq_gem: Move RCLK details out of driverSoren Brinkmann2014-02-19-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GEM driver should not need to know about Zynq specific details of RCLK related registers and bitfields in the SLCR. Move those details to the slcr driver. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | | | zynq: timer: Fix hangs if network activity attempted after about one hourMichal Simek2014-02-19-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cortex-A9 MPCore TRM' from ARM (ARM DDI 0407G ID072711) describes in the section 4.1.1 how this value calculation should be done. This patch fixes the problem if network activity such as ping or tftp is attempted after u-boot has been idle for an hour, it hangs, and cannot control-C out of it. Signed-off-by: Uday Hegde <udayh@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | | | zynq: timer: Migrate to zynq clock frameworkSoren Brinkmann2014-02-19-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove hardcoded frequencies in favor of Zynq clock framework. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | | | zynq: Provide a framework to read clock frequenciesSoren Brinkmann2014-02-19-0/+641
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.1 at 2024-11-19 10:12:02 +0000